1e32028a7SNikita Kiryanov /* 2e32028a7SNikita Kiryanov * Config file for Compulab CM-FX6 board 3e32028a7SNikita Kiryanov * 4e32028a7SNikita Kiryanov * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/ 5e32028a7SNikita Kiryanov * 6e32028a7SNikita Kiryanov * Author: Nikita Kiryanov <nikita@compulab.co.il> 7e32028a7SNikita Kiryanov * 8e32028a7SNikita Kiryanov * SPDX-License-Identifier: GPL-2.0+ 9e32028a7SNikita Kiryanov */ 10e32028a7SNikita Kiryanov 11e32028a7SNikita Kiryanov #ifndef __CONFIG_CM_FX6_H 12e32028a7SNikita Kiryanov #define __CONFIG_CM_FX6_H 13e32028a7SNikita Kiryanov 14e32028a7SNikita Kiryanov #include "mx6_common.h" 15e32028a7SNikita Kiryanov 16e32028a7SNikita Kiryanov /* Machine config */ 17e32028a7SNikita Kiryanov #define CONFIG_SYS_LITTLE_ENDIAN 18e32028a7SNikita Kiryanov #define CONFIG_MACH_TYPE 4273 19e32028a7SNikita Kiryanov 20e32028a7SNikita Kiryanov /* MMC */ 21e32028a7SNikita Kiryanov #define CONFIG_SYS_FSL_USDHC_NUM 3 22e32028a7SNikita Kiryanov #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR 23e32028a7SNikita Kiryanov 24e32028a7SNikita Kiryanov /* RAM */ 25e32028a7SNikita Kiryanov #define PHYS_SDRAM_1 MMDC0_ARB_BASE_ADDR 26e32028a7SNikita Kiryanov #define PHYS_SDRAM_2 MMDC1_ARB_BASE_ADDR 27e32028a7SNikita Kiryanov #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 28e32028a7SNikita Kiryanov #define CONFIG_NR_DRAM_BANKS 2 29e32028a7SNikita Kiryanov #define CONFIG_SYS_MEMTEST_START 0x10000000 30e32028a7SNikita Kiryanov #define CONFIG_SYS_MEMTEST_END 0x10010000 31e32028a7SNikita Kiryanov #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 32e32028a7SNikita Kiryanov #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 33e32028a7SNikita Kiryanov #define CONFIG_SYS_INIT_SP_OFFSET \ 34e32028a7SNikita Kiryanov (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 35e32028a7SNikita Kiryanov #define CONFIG_SYS_INIT_SP_ADDR \ 36e32028a7SNikita Kiryanov (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 37e32028a7SNikita Kiryanov 38e32028a7SNikita Kiryanov /* Serial console */ 39e32028a7SNikita Kiryanov #define CONFIG_MXC_UART 40e32028a7SNikita Kiryanov #define CONFIG_MXC_UART_BASE UART4_BASE 41e32028a7SNikita Kiryanov #define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200} 42e32028a7SNikita Kiryanov 43e32028a7SNikita Kiryanov /* SPI flash */ 44e32028a7SNikita Kiryanov #define CONFIG_SF_DEFAULT_BUS 0 45e32028a7SNikita Kiryanov #define CONFIG_SF_DEFAULT_CS 0 46e32028a7SNikita Kiryanov #define CONFIG_SF_DEFAULT_SPEED 25000000 47e32028a7SNikita Kiryanov #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) 48e32028a7SNikita Kiryanov 4963a93093SChristopher Spinrath /* MTD support */ 5063a93093SChristopher Spinrath #ifndef CONFIG_SPL_BUILD 5163a93093SChristopher Spinrath #define CONFIG_MTD_DEVICE 5263a93093SChristopher Spinrath #define CONFIG_MTD_PARTITIONS 5363a93093SChristopher Spinrath #define CONFIG_SPI_FLASH_MTD 5463a93093SChristopher Spinrath #endif 5563a93093SChristopher Spinrath 56e32028a7SNikita Kiryanov /* Environment */ 57e32028a7SNikita Kiryanov #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 58e32028a7SNikita Kiryanov #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE 59e32028a7SNikita Kiryanov #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS 60e32028a7SNikita Kiryanov #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS 61e32028a7SNikita Kiryanov #define CONFIG_ENV_SECT_SIZE (64 * 1024) 62e32028a7SNikita Kiryanov #define CONFIG_ENV_SIZE (8 * 1024) 63e32028a7SNikita Kiryanov #define CONFIG_ENV_OFFSET (768 * 1024) 64e32028a7SNikita Kiryanov 65e32028a7SNikita Kiryanov #define CONFIG_EXTRA_ENV_SETTINGS \ 661c2e5292SNikita Kiryanov "stdin=serial,usbkbd\0" \ 67deb94d61SNikita Kiryanov "stdout=serial,vga\0" \ 68deb94d61SNikita Kiryanov "stderr=serial,vga\0" \ 69deb94d61SNikita Kiryanov "panel=HDMI\0" \ 70e32028a7SNikita Kiryanov "autoload=no\0" \ 71f0f6724fSChristopher Spinrath "uImage=uImage-cm-fx6\0" \ 72f0f6724fSChristopher Spinrath "zImage=zImage-cm-fx6\0" \ 73508a6edeSNikita Kiryanov "kernel=uImage-cm-fx6\0" \ 74508a6edeSNikita Kiryanov "script=boot.scr\0" \ 75508a6edeSNikita Kiryanov "dtb=cm-fx6.dtb\0" \ 76508a6edeSNikita Kiryanov "bootm_low=18000000\0" \ 77e32028a7SNikita Kiryanov "loadaddr=0x10800000\0" \ 78e32028a7SNikita Kiryanov "fdtaddr=0x11000000\0" \ 79e32028a7SNikita Kiryanov "console=ttymxc3,115200\0" \ 80e32028a7SNikita Kiryanov "ethprime=FEC0\0" \ 81e32028a7SNikita Kiryanov "video_hdmi=mxcfb0:dev=hdmi,1920x1080M-32@50,if=RGB32\0" \ 82e32028a7SNikita Kiryanov "video_dvi=mxcfb0:dev=dvi,1280x800M-32@50,if=RGB32\0" \ 83e32028a7SNikita Kiryanov "doboot=bootm ${loadaddr}\0" \ 84508a6edeSNikita Kiryanov "doloadfdt=false\0" \ 85*43ede0bcSTom Rini "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ 86*43ede0bcSTom Rini "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ 87f0f6724fSChristopher Spinrath "setboottypez=setenv kernel ${zImage};" \ 88e32028a7SNikita Kiryanov "setenv doboot bootz ${loadaddr} - ${fdtaddr};" \ 89508a6edeSNikita Kiryanov "setenv doloadfdt true;\0" \ 90f0f6724fSChristopher Spinrath "setboottypem=setenv kernel ${uImage};" \ 91e32028a7SNikita Kiryanov "setenv doboot bootm ${loadaddr};" \ 92508a6edeSNikita Kiryanov "setenv doloadfdt false;\0"\ 93e32028a7SNikita Kiryanov "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \ 94206f38f7SNikita Kiryanov "sataroot=/dev/sda2 rw rootwait\0" \ 95a6b0652bSNikita Kiryanov "nandroot=/dev/mtdblock4 rw\0" \ 96a6b0652bSNikita Kiryanov "nandrootfstype=ubifs\0" \ 97508a6edeSNikita Kiryanov "mmcargs=setenv bootargs console=${console} root=${mmcroot} " \ 98f0f6724fSChristopher Spinrath "${video} ${extrabootargs}\0" \ 99508a6edeSNikita Kiryanov "sataargs=setenv bootargs console=${console} root=${sataroot} " \ 100f0f6724fSChristopher Spinrath "${video} ${extrabootargs}\0" \ 101a6b0652bSNikita Kiryanov "nandargs=setenv bootargs console=${console} " \ 102a6b0652bSNikita Kiryanov "root=${nandroot} " \ 103a6b0652bSNikita Kiryanov "rootfstype=${nandrootfstype} " \ 104f0f6724fSChristopher Spinrath "${video} ${extrabootargs}\0" \ 105508a6edeSNikita Kiryanov "nandboot=if run nandloadkernel; then " \ 106a6b0652bSNikita Kiryanov "run nandloadfdt;" \ 107508a6edeSNikita Kiryanov "run setboottypem;" \ 108508a6edeSNikita Kiryanov "run storagebootcmd;" \ 109508a6edeSNikita Kiryanov "run setboottypez;" \ 110508a6edeSNikita Kiryanov "run storagebootcmd;" \ 111508a6edeSNikita Kiryanov "fi;\0" \ 112508a6edeSNikita Kiryanov "run_eboot=echo Starting EBOOT ...; "\ 113508a6edeSNikita Kiryanov "mmc dev 2 && " \ 114508a6edeSNikita Kiryanov "mmc rescan && mmc read 10042000 a 400 && go 10042000\0" \ 115508a6edeSNikita Kiryanov "loadscript=load ${storagetype} ${storagedev} ${loadaddr} ${script};\0"\ 116508a6edeSNikita Kiryanov "loadkernel=load ${storagetype} ${storagedev} ${loadaddr} ${kernel};\0"\ 117508a6edeSNikita Kiryanov "loadfdt=load ${storagetype} ${storagedev} ${fdtaddr} ${dtb};\0" \ 118508a6edeSNikita Kiryanov "bootscript=echo Running bootscript from ${storagetype} ...;" \ 119508a6edeSNikita Kiryanov "source ${loadaddr};\0" \ 120508a6edeSNikita Kiryanov "nandloadkernel=nand read ${loadaddr} 0 780000;\0" \ 121508a6edeSNikita Kiryanov "nandloadfdt=nand read ${fdtaddr} 780000 80000;\0" \ 122508a6edeSNikita Kiryanov "setupmmcboot=setenv storagetype mmc; setenv storagedev 2;\0" \ 123508a6edeSNikita Kiryanov "setupsataboot=setenv storagetype sata; setenv storagedev 0;\0" \ 124508a6edeSNikita Kiryanov "setupnandboot=setenv storagetype nand;\0" \ 125508a6edeSNikita Kiryanov "setupusbboot=setenv storagetype usb; setenv storagedev 0;\0" \ 126508a6edeSNikita Kiryanov "storagebootcmd=echo Booting from ${storagetype} ...;" \ 127508a6edeSNikita Kiryanov "run ${storagetype}args; run doboot;\0" \ 128508a6edeSNikita Kiryanov "trybootk=if run loadkernel; then " \ 129508a6edeSNikita Kiryanov "if ${doloadfdt}; then " \ 130508a6edeSNikita Kiryanov "run loadfdt;" \ 131a6b0652bSNikita Kiryanov "fi;" \ 132508a6edeSNikita Kiryanov "run storagebootcmd;" \ 133508a6edeSNikita Kiryanov "fi;\0" \ 134508a6edeSNikita Kiryanov "trybootsmz=if run loadscript; then " \ 135508a6edeSNikita Kiryanov "run bootscript;" \ 136e32028a7SNikita Kiryanov "fi;" \ 137508a6edeSNikita Kiryanov "run setboottypem;" \ 138508a6edeSNikita Kiryanov "run trybootk;" \ 139508a6edeSNikita Kiryanov "run setboottypez;" \ 140508a6edeSNikita Kiryanov "run trybootk;\0" 141e32028a7SNikita Kiryanov 142e32028a7SNikita Kiryanov #define CONFIG_BOOTCOMMAND \ 143508a6edeSNikita Kiryanov "run setupmmcboot;" \ 144508a6edeSNikita Kiryanov "mmc dev ${storagedev};" \ 145508a6edeSNikita Kiryanov "if mmc rescan; then " \ 146508a6edeSNikita Kiryanov "run trybootsmz;" \ 147508a6edeSNikita Kiryanov "fi;" \ 148508a6edeSNikita Kiryanov "run setupusbboot;" \ 149508a6edeSNikita Kiryanov "if usb start; then "\ 150508a6edeSNikita Kiryanov "if run loadscript; then " \ 151508a6edeSNikita Kiryanov "run bootscript;" \ 152508a6edeSNikita Kiryanov "fi;" \ 153508a6edeSNikita Kiryanov "fi;" \ 154508a6edeSNikita Kiryanov "run setupsataboot;" \ 155508a6edeSNikita Kiryanov "if sata init; then " \ 156508a6edeSNikita Kiryanov "run trybootsmz;" \ 157508a6edeSNikita Kiryanov "fi;" \ 158508a6edeSNikita Kiryanov "run setupnandboot;" \ 159508a6edeSNikita Kiryanov "run nandboot;" 160e32028a7SNikita Kiryanov 16163a93093SChristopher Spinrath #define CONFIG_PREBOOT "usb start;sf probe" 1621c2e5292SNikita Kiryanov 163e32028a7SNikita Kiryanov /* SPI */ 164e32028a7SNikita Kiryanov #define CONFIG_SPI 165e32028a7SNikita Kiryanov #define CONFIG_MXC_SPI 166e32028a7SNikita Kiryanov 167a6b0652bSNikita Kiryanov /* NAND */ 168a6b0652bSNikita Kiryanov #ifndef CONFIG_SPL_BUILD 169a6b0652bSNikita Kiryanov #define CONFIG_SYS_NAND_BASE 0x40000000 170a6b0652bSNikita Kiryanov #define CONFIG_SYS_NAND_MAX_CHIPS 1 171a6b0652bSNikita Kiryanov #define CONFIG_SYS_MAX_NAND_DEVICE 1 172a6b0652bSNikita Kiryanov #define CONFIG_NAND_MXS 173a6b0652bSNikita Kiryanov #define CONFIG_SYS_NAND_ONFI_DETECTION 174a6b0652bSNikita Kiryanov /* APBH DMA is required for NAND support */ 175a6b0652bSNikita Kiryanov #define CONFIG_APBH_DMA 176a6b0652bSNikita Kiryanov #define CONFIG_APBH_DMA_BURST 177a6b0652bSNikita Kiryanov #define CONFIG_APBH_DMA_BURST8 178a6b0652bSNikita Kiryanov #endif 179a6b0652bSNikita Kiryanov 18002b1343eSNikita Kiryanov /* Ethernet */ 18102b1343eSNikita Kiryanov #define CONFIG_FEC_MXC 18202b1343eSNikita Kiryanov #define CONFIG_FEC_MXC_PHYADDR 0 18302b1343eSNikita Kiryanov #define CONFIG_FEC_XCV_TYPE RGMII 18402b1343eSNikita Kiryanov #define IMX_FEC_BASE ENET_BASE_ADDR 18502b1343eSNikita Kiryanov #define CONFIG_PHY_ATHEROS 18602b1343eSNikita Kiryanov #define CONFIG_MII 18702b1343eSNikita Kiryanov #define CONFIG_ETHPRIME "FEC0" 18802b1343eSNikita Kiryanov #define CONFIG_ARP_TIMEOUT 200UL 18902b1343eSNikita Kiryanov #define CONFIG_NET_RETRY_COUNT 5 19002b1343eSNikita Kiryanov 1910f3effb9SNikita Kiryanov /* USB */ 1920f3effb9SNikita Kiryanov #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 1930f3effb9SNikita Kiryanov #define CONFIG_MXC_USB_FLAGS 0 1940f3effb9SNikita Kiryanov #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 1950f3effb9SNikita Kiryanov #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ 1960f3effb9SNikita Kiryanov 197f42b2f60SNikita Kiryanov /* I2C */ 198f42b2f60SNikita Kiryanov #define CONFIG_SYS_I2C 199f42b2f60SNikita Kiryanov #define CONFIG_SYS_I2C_MXC 20003544c66SAlbert ARIBAUD \\(3ADEV\\) #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 20103544c66SAlbert ARIBAUD \\(3ADEV\\) #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 202f8cb101eSYork Sun #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 203f42b2f60SNikita Kiryanov #define CONFIG_SYS_I2C_SPEED 100000 204f42b2f60SNikita Kiryanov #define CONFIG_SYS_MXC_I2C3_SPEED 400000 205f42b2f60SNikita Kiryanov 206f42b2f60SNikita Kiryanov #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 207f42b2f60SNikita Kiryanov #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 208f42b2f60SNikita Kiryanov #define CONFIG_SYS_I2C_EEPROM_BUS 2 209f42b2f60SNikita Kiryanov 210206f38f7SNikita Kiryanov /* SATA */ 211206f38f7SNikita Kiryanov #define CONFIG_SYS_SATA_MAX_DEVICE 1 212206f38f7SNikita Kiryanov #define CONFIG_LIBATA 213206f38f7SNikita Kiryanov #define CONFIG_LBA48 214206f38f7SNikita Kiryanov #define CONFIG_DWC_AHSATA 215206f38f7SNikita Kiryanov #define CONFIG_DWC_AHSATA_PORT_ID 0 216206f38f7SNikita Kiryanov #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR 217206f38f7SNikita Kiryanov 218e32028a7SNikita Kiryanov /* Boot */ 219e32028a7SNikita Kiryanov #define CONFIG_SYS_BOOTMAPSZ (8 << 20) 220f66113c0SNikita Kiryanov #define CONFIG_SERIAL_TAG 221e32028a7SNikita Kiryanov 222e32028a7SNikita Kiryanov /* misc */ 2239fbdcf01SNikita Kiryanov #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) 2247d1abb7dSNikita Kiryanov #define CONFIG_MISC_INIT_R 225e32028a7SNikita Kiryanov 226e32028a7SNikita Kiryanov /* SPL */ 227e32028a7SNikita Kiryanov #include "imx6_spl.h" 228e32028a7SNikita Kiryanov #define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024) 229e32028a7SNikita Kiryanov #define CONFIG_SPL_SPI_LOAD 230e32028a7SNikita Kiryanov 231deb94d61SNikita Kiryanov /* Display */ 232deb94d61SNikita Kiryanov #define CONFIG_VIDEO_IPUV3 233deb94d61SNikita Kiryanov #define CONFIG_IMX_HDMI 234deb94d61SNikita Kiryanov 2353a236a35SNikita Kiryanov #define CONFIG_SPLASH_SCREEN 236f82eb2faSNikita Kiryanov #define CONFIG_SPLASH_SOURCE 2373a236a35SNikita Kiryanov #define CONFIG_VIDEO_BMP_RLE8 2383a236a35SNikita Kiryanov 2398015dde8SNikita Kiryanov #define CONFIG_VIDEO_LOGO 2408015dde8SNikita Kiryanov #define CONFIG_VIDEO_BMP_LOGO 2418015dde8SNikita Kiryanov 24212616531SNikita Kiryanov /* EEPROM */ 24312616531SNikita Kiryanov #define CONFIG_ENV_EEPROM_IS_ON_I2C 24412616531SNikita Kiryanov #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 24512616531SNikita Kiryanov #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 24612616531SNikita Kiryanov #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 24712616531SNikita Kiryanov #define CONFIG_SYS_EEPROM_SIZE 256 24812616531SNikita Kiryanov 249e32028a7SNikita Kiryanov #endif /* __CONFIG_CM_FX6_H */ 250