1e32028a7SNikita Kiryanov /* 2e32028a7SNikita Kiryanov * Config file for Compulab CM-FX6 board 3e32028a7SNikita Kiryanov * 4e32028a7SNikita Kiryanov * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/ 5e32028a7SNikita Kiryanov * 6e32028a7SNikita Kiryanov * Author: Nikita Kiryanov <nikita@compulab.co.il> 7e32028a7SNikita Kiryanov * 8e32028a7SNikita Kiryanov * SPDX-License-Identifier: GPL-2.0+ 9e32028a7SNikita Kiryanov */ 10e32028a7SNikita Kiryanov 11e32028a7SNikita Kiryanov #ifndef __CONFIG_CM_FX6_H 12e32028a7SNikita Kiryanov #define __CONFIG_CM_FX6_H 13e32028a7SNikita Kiryanov 14e32028a7SNikita Kiryanov #include "mx6_common.h" 15e32028a7SNikita Kiryanov 16*3ef5f671SChristopher Spinrath #ifndef CONFIG_SPL_BUILD 17*3ef5f671SChristopher Spinrath #include <config_distro_defaults.h> 18*3ef5f671SChristopher Spinrath #endif 19*3ef5f671SChristopher Spinrath 20e32028a7SNikita Kiryanov /* Machine config */ 21e32028a7SNikita Kiryanov #define CONFIG_SYS_LITTLE_ENDIAN 22e32028a7SNikita Kiryanov #define CONFIG_MACH_TYPE 4273 23e32028a7SNikita Kiryanov 24e32028a7SNikita Kiryanov /* MMC */ 25e32028a7SNikita Kiryanov #define CONFIG_SYS_FSL_USDHC_NUM 3 26e32028a7SNikita Kiryanov #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR 27e32028a7SNikita Kiryanov 28e32028a7SNikita Kiryanov /* RAM */ 29e32028a7SNikita Kiryanov #define PHYS_SDRAM_1 MMDC0_ARB_BASE_ADDR 30e32028a7SNikita Kiryanov #define PHYS_SDRAM_2 MMDC1_ARB_BASE_ADDR 31e32028a7SNikita Kiryanov #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 32e32028a7SNikita Kiryanov #define CONFIG_NR_DRAM_BANKS 2 33e32028a7SNikita Kiryanov #define CONFIG_SYS_MEMTEST_START 0x10000000 34e32028a7SNikita Kiryanov #define CONFIG_SYS_MEMTEST_END 0x10010000 35e32028a7SNikita Kiryanov #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 36e32028a7SNikita Kiryanov #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 37e32028a7SNikita Kiryanov #define CONFIG_SYS_INIT_SP_OFFSET \ 38e32028a7SNikita Kiryanov (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 39e32028a7SNikita Kiryanov #define CONFIG_SYS_INIT_SP_ADDR \ 40e32028a7SNikita Kiryanov (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 41e32028a7SNikita Kiryanov 42e32028a7SNikita Kiryanov /* Serial console */ 43e32028a7SNikita Kiryanov #define CONFIG_MXC_UART 44e32028a7SNikita Kiryanov #define CONFIG_MXC_UART_BASE UART4_BASE 45e32028a7SNikita Kiryanov #define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200} 46e32028a7SNikita Kiryanov 47e32028a7SNikita Kiryanov /* SPI flash */ 48e32028a7SNikita Kiryanov #define CONFIG_SF_DEFAULT_BUS 0 49e32028a7SNikita Kiryanov #define CONFIG_SF_DEFAULT_CS 0 50e32028a7SNikita Kiryanov #define CONFIG_SF_DEFAULT_SPEED 25000000 51e32028a7SNikita Kiryanov #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) 52e32028a7SNikita Kiryanov 5363a93093SChristopher Spinrath /* MTD support */ 5463a93093SChristopher Spinrath #ifndef CONFIG_SPL_BUILD 5563a93093SChristopher Spinrath #define CONFIG_MTD_DEVICE 5663a93093SChristopher Spinrath #define CONFIG_MTD_PARTITIONS 5763a93093SChristopher Spinrath #define CONFIG_SPI_FLASH_MTD 5863a93093SChristopher Spinrath #endif 5963a93093SChristopher Spinrath 60e32028a7SNikita Kiryanov /* Environment */ 61e32028a7SNikita Kiryanov #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 62e32028a7SNikita Kiryanov #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE 63e32028a7SNikita Kiryanov #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS 64e32028a7SNikita Kiryanov #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS 65e32028a7SNikita Kiryanov #define CONFIG_ENV_SECT_SIZE (64 * 1024) 66e32028a7SNikita Kiryanov #define CONFIG_ENV_SIZE (8 * 1024) 67e32028a7SNikita Kiryanov #define CONFIG_ENV_OFFSET (768 * 1024) 68e32028a7SNikita Kiryanov 69*3ef5f671SChristopher Spinrath #ifndef CONFIG_SPL_BUILD 70e32028a7SNikita Kiryanov #define CONFIG_EXTRA_ENV_SETTINGS \ 716b79f71cSChristopher Spinrath "fdt_high=0xffffffff\0" \ 726b79f71cSChristopher Spinrath "initrd_high=0xffffffff\0" \ 736b79f71cSChristopher Spinrath "fdt_addr_r=0x18000000\0" \ 746b79f71cSChristopher Spinrath "ramdisk_addr_r=0x13000000\0" \ 756b79f71cSChristopher Spinrath "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ 766b79f71cSChristopher Spinrath "pxefile_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ 776b79f71cSChristopher Spinrath "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \ 781c2e5292SNikita Kiryanov "stdin=serial,usbkbd\0" \ 79deb94d61SNikita Kiryanov "stdout=serial,vga\0" \ 80deb94d61SNikita Kiryanov "stderr=serial,vga\0" \ 81deb94d61SNikita Kiryanov "panel=HDMI\0" \ 82e32028a7SNikita Kiryanov "autoload=no\0" \ 83f0f6724fSChristopher Spinrath "uImage=uImage-cm-fx6\0" \ 84f0f6724fSChristopher Spinrath "zImage=zImage-cm-fx6\0" \ 85508a6edeSNikita Kiryanov "kernel=uImage-cm-fx6\0" \ 86508a6edeSNikita Kiryanov "script=boot.scr\0" \ 87508a6edeSNikita Kiryanov "dtb=cm-fx6.dtb\0" \ 88e32028a7SNikita Kiryanov "console=ttymxc3,115200\0" \ 89e32028a7SNikita Kiryanov "ethprime=FEC0\0" \ 90e32028a7SNikita Kiryanov "video_hdmi=mxcfb0:dev=hdmi,1920x1080M-32@50,if=RGB32\0" \ 91e32028a7SNikita Kiryanov "video_dvi=mxcfb0:dev=dvi,1280x800M-32@50,if=RGB32\0" \ 926b79f71cSChristopher Spinrath "doboot=bootm ${kernel_addr_r}\0" \ 93508a6edeSNikita Kiryanov "doloadfdt=false\0" \ 9443ede0bcSTom Rini "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ 9543ede0bcSTom Rini "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ 96f0f6724fSChristopher Spinrath "setboottypez=setenv kernel ${zImage};" \ 976b79f71cSChristopher Spinrath "setenv doboot bootz ${kernel_addr_r} - ${fdt_addr_r};" \ 98508a6edeSNikita Kiryanov "setenv doloadfdt true;\0" \ 99f0f6724fSChristopher Spinrath "setboottypem=setenv kernel ${uImage};" \ 1006b79f71cSChristopher Spinrath "setenv doboot bootm ${kernel_addr_r};" \ 101508a6edeSNikita Kiryanov "setenv doloadfdt false;\0"\ 102e32028a7SNikita Kiryanov "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \ 103206f38f7SNikita Kiryanov "sataroot=/dev/sda2 rw rootwait\0" \ 104a6b0652bSNikita Kiryanov "nandroot=/dev/mtdblock4 rw\0" \ 105a6b0652bSNikita Kiryanov "nandrootfstype=ubifs\0" \ 106508a6edeSNikita Kiryanov "mmcargs=setenv bootargs console=${console} root=${mmcroot} " \ 107f0f6724fSChristopher Spinrath "${video} ${extrabootargs}\0" \ 108508a6edeSNikita Kiryanov "sataargs=setenv bootargs console=${console} root=${sataroot} " \ 109f0f6724fSChristopher Spinrath "${video} ${extrabootargs}\0" \ 110a6b0652bSNikita Kiryanov "nandargs=setenv bootargs console=${console} " \ 111a6b0652bSNikita Kiryanov "root=${nandroot} " \ 112a6b0652bSNikita Kiryanov "rootfstype=${nandrootfstype} " \ 113f0f6724fSChristopher Spinrath "${video} ${extrabootargs}\0" \ 114508a6edeSNikita Kiryanov "nandboot=if run nandloadkernel; then " \ 115a6b0652bSNikita Kiryanov "run nandloadfdt;" \ 116508a6edeSNikita Kiryanov "run setboottypem;" \ 117508a6edeSNikita Kiryanov "run storagebootcmd;" \ 118508a6edeSNikita Kiryanov "run setboottypez;" \ 119508a6edeSNikita Kiryanov "run storagebootcmd;" \ 120508a6edeSNikita Kiryanov "fi;\0" \ 121508a6edeSNikita Kiryanov "run_eboot=echo Starting EBOOT ...; "\ 122508a6edeSNikita Kiryanov "mmc dev 2 && " \ 123508a6edeSNikita Kiryanov "mmc rescan && mmc read 10042000 a 400 && go 10042000\0" \ 1246b79f71cSChristopher Spinrath "loadscript=load ${storagetype} ${storagedev} ${scriptaddr} ${script};\0"\ 1256b79f71cSChristopher Spinrath "loadkernel=load ${storagetype} ${storagedev} ${kernel_addr_r} ${kernel};\0"\ 1266b79f71cSChristopher Spinrath "loadfdt=load ${storagetype} ${storagedev} ${fdt_addr_r} ${dtb};\0" \ 127508a6edeSNikita Kiryanov "bootscript=echo Running bootscript from ${storagetype} ...;" \ 1286b79f71cSChristopher Spinrath "source ${scriptaddr};\0" \ 1296b79f71cSChristopher Spinrath "nandloadkernel=nand read ${kernel_addr_r} 0 780000;\0" \ 1306b79f71cSChristopher Spinrath "nandloadfdt=nand read ${fdt_addr_r} 780000 80000;\0" \ 131508a6edeSNikita Kiryanov "setupmmcboot=setenv storagetype mmc; setenv storagedev 2;\0" \ 132508a6edeSNikita Kiryanov "setupsataboot=setenv storagetype sata; setenv storagedev 0;\0" \ 133508a6edeSNikita Kiryanov "setupnandboot=setenv storagetype nand;\0" \ 134508a6edeSNikita Kiryanov "storagebootcmd=echo Booting from ${storagetype} ...;" \ 135508a6edeSNikita Kiryanov "run ${storagetype}args; run doboot;\0" \ 136508a6edeSNikita Kiryanov "trybootk=if run loadkernel; then " \ 137508a6edeSNikita Kiryanov "if ${doloadfdt}; then " \ 138508a6edeSNikita Kiryanov "run loadfdt;" \ 139a6b0652bSNikita Kiryanov "fi;" \ 140508a6edeSNikita Kiryanov "run storagebootcmd;" \ 141508a6edeSNikita Kiryanov "fi;\0" \ 142508a6edeSNikita Kiryanov "trybootsmz=if run loadscript; then " \ 143508a6edeSNikita Kiryanov "run bootscript;" \ 144e32028a7SNikita Kiryanov "fi;" \ 145508a6edeSNikita Kiryanov "run setboottypem;" \ 146508a6edeSNikita Kiryanov "run trybootk;" \ 147508a6edeSNikita Kiryanov "run setboottypez;" \ 148*3ef5f671SChristopher Spinrath "run trybootk;\0" \ 149*3ef5f671SChristopher Spinrath "legacy_bootcmd=" \ 150508a6edeSNikita Kiryanov "run setupmmcboot;" \ 151508a6edeSNikita Kiryanov "mmc dev ${storagedev};" \ 152508a6edeSNikita Kiryanov "if mmc rescan; then " \ 153508a6edeSNikita Kiryanov "run trybootsmz;" \ 154508a6edeSNikita Kiryanov "fi;" \ 155508a6edeSNikita Kiryanov "run setupsataboot;" \ 156508a6edeSNikita Kiryanov "if sata init; then " \ 157508a6edeSNikita Kiryanov "run trybootsmz;" \ 158508a6edeSNikita Kiryanov "fi;" \ 159508a6edeSNikita Kiryanov "run setupnandboot;" \ 160*3ef5f671SChristopher Spinrath "run nandboot;\0" \ 161*3ef5f671SChristopher Spinrath BOOTENV 162e32028a7SNikita Kiryanov 16363a93093SChristopher Spinrath #define CONFIG_PREBOOT "usb start;sf probe" 1641c2e5292SNikita Kiryanov 165*3ef5f671SChristopher Spinrath #define BOOT_TARGET_DEVICES(func) \ 166*3ef5f671SChristopher Spinrath func(USB, usb, 0) \ 167*3ef5f671SChristopher Spinrath func(MMC, mmc, 2) \ 168*3ef5f671SChristopher Spinrath func(SATA, sata, 0) 169*3ef5f671SChristopher Spinrath 170*3ef5f671SChristopher Spinrath #include <config_distro_bootcmd.h> 171*3ef5f671SChristopher Spinrath #else 172*3ef5f671SChristopher Spinrath #define CONFIG_EXTRA_ENV_SETTINGS 173*3ef5f671SChristopher Spinrath #endif 174*3ef5f671SChristopher Spinrath 175e32028a7SNikita Kiryanov /* SPI */ 176e32028a7SNikita Kiryanov #define CONFIG_SPI 177e32028a7SNikita Kiryanov #define CONFIG_MXC_SPI 178e32028a7SNikita Kiryanov 179a6b0652bSNikita Kiryanov /* NAND */ 180a6b0652bSNikita Kiryanov #ifndef CONFIG_SPL_BUILD 181a6b0652bSNikita Kiryanov #define CONFIG_SYS_NAND_BASE 0x40000000 182a6b0652bSNikita Kiryanov #define CONFIG_SYS_NAND_MAX_CHIPS 1 183a6b0652bSNikita Kiryanov #define CONFIG_SYS_MAX_NAND_DEVICE 1 184a6b0652bSNikita Kiryanov #define CONFIG_NAND_MXS 185a6b0652bSNikita Kiryanov #define CONFIG_SYS_NAND_ONFI_DETECTION 186a6b0652bSNikita Kiryanov /* APBH DMA is required for NAND support */ 187a6b0652bSNikita Kiryanov #define CONFIG_APBH_DMA 188a6b0652bSNikita Kiryanov #define CONFIG_APBH_DMA_BURST 189a6b0652bSNikita Kiryanov #define CONFIG_APBH_DMA_BURST8 190a6b0652bSNikita Kiryanov #endif 191a6b0652bSNikita Kiryanov 19202b1343eSNikita Kiryanov /* Ethernet */ 19302b1343eSNikita Kiryanov #define CONFIG_FEC_MXC 19402b1343eSNikita Kiryanov #define CONFIG_FEC_MXC_PHYADDR 0 19502b1343eSNikita Kiryanov #define CONFIG_FEC_XCV_TYPE RGMII 19602b1343eSNikita Kiryanov #define IMX_FEC_BASE ENET_BASE_ADDR 19702b1343eSNikita Kiryanov #define CONFIG_PHY_ATHEROS 19802b1343eSNikita Kiryanov #define CONFIG_MII 19902b1343eSNikita Kiryanov #define CONFIG_ETHPRIME "FEC0" 20002b1343eSNikita Kiryanov #define CONFIG_ARP_TIMEOUT 200UL 20102b1343eSNikita Kiryanov #define CONFIG_NET_RETRY_COUNT 5 20202b1343eSNikita Kiryanov 2030f3effb9SNikita Kiryanov /* USB */ 2040f3effb9SNikita Kiryanov #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 2050f3effb9SNikita Kiryanov #define CONFIG_MXC_USB_FLAGS 0 2060f3effb9SNikita Kiryanov #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 2070f3effb9SNikita Kiryanov #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ 2080f3effb9SNikita Kiryanov 209f42b2f60SNikita Kiryanov /* I2C */ 210f42b2f60SNikita Kiryanov #define CONFIG_SYS_I2C 211f42b2f60SNikita Kiryanov #define CONFIG_SYS_I2C_MXC 21203544c66SAlbert ARIBAUD \\(3ADEV\\) #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 21303544c66SAlbert ARIBAUD \\(3ADEV\\) #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 214f8cb101eSYork Sun #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 215f42b2f60SNikita Kiryanov #define CONFIG_SYS_I2C_SPEED 100000 216f42b2f60SNikita Kiryanov #define CONFIG_SYS_MXC_I2C3_SPEED 400000 217f42b2f60SNikita Kiryanov 218f42b2f60SNikita Kiryanov #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 219f42b2f60SNikita Kiryanov #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 220f42b2f60SNikita Kiryanov #define CONFIG_SYS_I2C_EEPROM_BUS 2 221f42b2f60SNikita Kiryanov 222206f38f7SNikita Kiryanov /* SATA */ 223206f38f7SNikita Kiryanov #define CONFIG_SYS_SATA_MAX_DEVICE 1 224206f38f7SNikita Kiryanov #define CONFIG_LBA48 225206f38f7SNikita Kiryanov #define CONFIG_DWC_AHSATA_PORT_ID 0 226206f38f7SNikita Kiryanov #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR 227206f38f7SNikita Kiryanov 228e32028a7SNikita Kiryanov /* Boot */ 229e32028a7SNikita Kiryanov #define CONFIG_SYS_BOOTMAPSZ (8 << 20) 230f66113c0SNikita Kiryanov #define CONFIG_SERIAL_TAG 231e32028a7SNikita Kiryanov 232e32028a7SNikita Kiryanov /* misc */ 2339fbdcf01SNikita Kiryanov #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) 2347d1abb7dSNikita Kiryanov #define CONFIG_MISC_INIT_R 235e32028a7SNikita Kiryanov 236e32028a7SNikita Kiryanov /* SPL */ 237e32028a7SNikita Kiryanov #include "imx6_spl.h" 238e32028a7SNikita Kiryanov #define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024) 239e32028a7SNikita Kiryanov #define CONFIG_SPL_SPI_LOAD 240e32028a7SNikita Kiryanov 241deb94d61SNikita Kiryanov /* Display */ 242deb94d61SNikita Kiryanov #define CONFIG_VIDEO_IPUV3 243deb94d61SNikita Kiryanov #define CONFIG_IMX_HDMI 244deb94d61SNikita Kiryanov 2453a236a35SNikita Kiryanov #define CONFIG_SPLASH_SCREEN 246f82eb2faSNikita Kiryanov #define CONFIG_SPLASH_SOURCE 2473a236a35SNikita Kiryanov #define CONFIG_VIDEO_BMP_RLE8 2483a236a35SNikita Kiryanov 2498015dde8SNikita Kiryanov #define CONFIG_VIDEO_LOGO 2508015dde8SNikita Kiryanov #define CONFIG_VIDEO_BMP_LOGO 2518015dde8SNikita Kiryanov 25212616531SNikita Kiryanov /* EEPROM */ 25312616531SNikita Kiryanov #define CONFIG_ENV_EEPROM_IS_ON_I2C 25412616531SNikita Kiryanov #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 25512616531SNikita Kiryanov #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 25612616531SNikita Kiryanov #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 25712616531SNikita Kiryanov #define CONFIG_SYS_EEPROM_SIZE 256 25812616531SNikita Kiryanov 259e32028a7SNikita Kiryanov #endif /* __CONFIG_CM_FX6_H */ 260