xref: /openbmc/u-boot/include/configs/cm_fx6.h (revision 12616531)
1e32028a7SNikita Kiryanov /*
2e32028a7SNikita Kiryanov  * Config file for Compulab CM-FX6 board
3e32028a7SNikita Kiryanov  *
4e32028a7SNikita Kiryanov  * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/
5e32028a7SNikita Kiryanov  *
6e32028a7SNikita Kiryanov  * Author: Nikita Kiryanov <nikita@compulab.co.il>
7e32028a7SNikita Kiryanov  *
8e32028a7SNikita Kiryanov  * SPDX-License-Identifier:	GPL-2.0+
9e32028a7SNikita Kiryanov  */
10e32028a7SNikita Kiryanov 
11e32028a7SNikita Kiryanov #ifndef __CONFIG_CM_FX6_H
12e32028a7SNikita Kiryanov #define __CONFIG_CM_FX6_H
13e32028a7SNikita Kiryanov 
14e32028a7SNikita Kiryanov #include "mx6_common.h"
15e32028a7SNikita Kiryanov 
16e32028a7SNikita Kiryanov /* Machine config */
17e32028a7SNikita Kiryanov #define CONFIG_SYS_LITTLE_ENDIAN
18e32028a7SNikita Kiryanov #define CONFIG_MACH_TYPE		4273
19e32028a7SNikita Kiryanov 
20e32028a7SNikita Kiryanov /* CMD */
21e32028a7SNikita Kiryanov 
22e32028a7SNikita Kiryanov /* MMC */
23e32028a7SNikita Kiryanov #define CONFIG_SYS_FSL_USDHC_NUM	3
24e32028a7SNikita Kiryanov #define CONFIG_SYS_FSL_ESDHC_ADDR	USDHC2_BASE_ADDR
25e32028a7SNikita Kiryanov 
26e32028a7SNikita Kiryanov /* RAM */
27e32028a7SNikita Kiryanov #define PHYS_SDRAM_1			MMDC0_ARB_BASE_ADDR
28e32028a7SNikita Kiryanov #define PHYS_SDRAM_2			MMDC1_ARB_BASE_ADDR
29e32028a7SNikita Kiryanov #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
30e32028a7SNikita Kiryanov #define CONFIG_NR_DRAM_BANKS		2
31e32028a7SNikita Kiryanov #define CONFIG_SYS_MEMTEST_START	0x10000000
32e32028a7SNikita Kiryanov #define CONFIG_SYS_MEMTEST_END		0x10010000
33e32028a7SNikita Kiryanov #define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
34e32028a7SNikita Kiryanov #define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE
35e32028a7SNikita Kiryanov #define CONFIG_SYS_INIT_SP_OFFSET \
36e32028a7SNikita Kiryanov 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
37e32028a7SNikita Kiryanov #define CONFIG_SYS_INIT_SP_ADDR \
38e32028a7SNikita Kiryanov 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
39e32028a7SNikita Kiryanov 
40e32028a7SNikita Kiryanov /* Serial console */
41e32028a7SNikita Kiryanov #define CONFIG_MXC_UART
42e32028a7SNikita Kiryanov #define CONFIG_MXC_UART_BASE		UART4_BASE
43e32028a7SNikita Kiryanov #define CONFIG_BAUDRATE			115200
44e32028a7SNikita Kiryanov #define CONFIG_SYS_BAUDRATE_TABLE	{9600, 19200, 38400, 57600, 115200}
45e32028a7SNikita Kiryanov 
46e32028a7SNikita Kiryanov /* Shell */
47e32028a7SNikita Kiryanov #define CONFIG_SYS_PBSIZE	(CONFIG_SYS_CBSIZE + \
48e32028a7SNikita Kiryanov 					sizeof(CONFIG_SYS_PROMPT) + 16)
49e32028a7SNikita Kiryanov 
50e32028a7SNikita Kiryanov /* SPI flash */
51e32028a7SNikita Kiryanov #define CONFIG_SF_DEFAULT_BUS		0
52e32028a7SNikita Kiryanov #define CONFIG_SF_DEFAULT_CS		0
53e32028a7SNikita Kiryanov #define CONFIG_SF_DEFAULT_SPEED		25000000
54e32028a7SNikita Kiryanov #define CONFIG_SF_DEFAULT_MODE		(SPI_MODE_0)
55e32028a7SNikita Kiryanov 
56e32028a7SNikita Kiryanov /* Environment */
57e32028a7SNikita Kiryanov #define CONFIG_ENV_IS_IN_SPI_FLASH
58e32028a7SNikita Kiryanov #define CONFIG_ENV_SPI_MAX_HZ		CONFIG_SF_DEFAULT_SPEED
59e32028a7SNikita Kiryanov #define CONFIG_ENV_SPI_MODE		CONFIG_SF_DEFAULT_MODE
60e32028a7SNikita Kiryanov #define CONFIG_ENV_SPI_BUS		CONFIG_SF_DEFAULT_BUS
61e32028a7SNikita Kiryanov #define CONFIG_ENV_SPI_CS		CONFIG_SF_DEFAULT_CS
62e32028a7SNikita Kiryanov #define CONFIG_ENV_SECT_SIZE		(64 * 1024)
63e32028a7SNikita Kiryanov #define CONFIG_ENV_SIZE			(8 * 1024)
64e32028a7SNikita Kiryanov #define CONFIG_ENV_OFFSET		(768 * 1024)
65e32028a7SNikita Kiryanov 
66e32028a7SNikita Kiryanov #define CONFIG_EXTRA_ENV_SETTINGS \
671c2e5292SNikita Kiryanov 	"stdin=serial,usbkbd\0" \
68deb94d61SNikita Kiryanov 	"stdout=serial,vga\0" \
69deb94d61SNikita Kiryanov 	"stderr=serial,vga\0" \
70deb94d61SNikita Kiryanov 	"panel=HDMI\0" \
71e32028a7SNikita Kiryanov 	"autoload=no\0" \
72508a6edeSNikita Kiryanov 	"kernel=uImage-cm-fx6\0" \
73508a6edeSNikita Kiryanov 	"script=boot.scr\0" \
74508a6edeSNikita Kiryanov 	"dtb=cm-fx6.dtb\0" \
75508a6edeSNikita Kiryanov 	"bootm_low=18000000\0" \
76e32028a7SNikita Kiryanov 	"loadaddr=0x10800000\0" \
77e32028a7SNikita Kiryanov 	"fdtaddr=0x11000000\0" \
78e32028a7SNikita Kiryanov 	"console=ttymxc3,115200\0" \
79e32028a7SNikita Kiryanov 	"ethprime=FEC0\0" \
80e32028a7SNikita Kiryanov 	"video_hdmi=mxcfb0:dev=hdmi,1920x1080M-32@50,if=RGB32\0" \
81e32028a7SNikita Kiryanov 	"video_dvi=mxcfb0:dev=dvi,1280x800M-32@50,if=RGB32\0" \
82e32028a7SNikita Kiryanov 	"doboot=bootm ${loadaddr}\0" \
83508a6edeSNikita Kiryanov 	"doloadfdt=false\0" \
84e32028a7SNikita Kiryanov 	"setboottypez=setenv kernel zImage-cm-fx6;" \
85e32028a7SNikita Kiryanov 		"setenv doboot bootz ${loadaddr} - ${fdtaddr};" \
86508a6edeSNikita Kiryanov 		"setenv doloadfdt true;\0" \
87e32028a7SNikita Kiryanov 	"setboottypem=setenv kernel uImage-cm-fx6;" \
88e32028a7SNikita Kiryanov 		"setenv doboot bootm ${loadaddr};" \
89508a6edeSNikita Kiryanov 		"setenv doloadfdt false;\0"\
90e32028a7SNikita Kiryanov 	"mmcroot=/dev/mmcblk0p2 rw rootwait\0" \
91206f38f7SNikita Kiryanov 	"sataroot=/dev/sda2 rw rootwait\0" \
92a6b0652bSNikita Kiryanov 	"nandroot=/dev/mtdblock4 rw\0" \
93a6b0652bSNikita Kiryanov 	"nandrootfstype=ubifs\0" \
94508a6edeSNikita Kiryanov 	"mmcargs=setenv bootargs console=${console} root=${mmcroot} " \
95508a6edeSNikita Kiryanov 		"${video}\0" \
96508a6edeSNikita Kiryanov 	"sataargs=setenv bootargs console=${console} root=${sataroot} " \
97508a6edeSNikita Kiryanov 		"${video}\0" \
98a6b0652bSNikita Kiryanov 	"nandargs=setenv bootargs console=${console} " \
99a6b0652bSNikita Kiryanov 		"root=${nandroot} " \
100a6b0652bSNikita Kiryanov 		"rootfstype=${nandrootfstype} " \
101a6b0652bSNikita Kiryanov 		"${video}\0" \
102508a6edeSNikita Kiryanov 	"nandboot=if run nandloadkernel; then " \
103a6b0652bSNikita Kiryanov 			"run nandloadfdt;" \
104508a6edeSNikita Kiryanov 			"run setboottypem;" \
105508a6edeSNikita Kiryanov 			"run storagebootcmd;" \
106508a6edeSNikita Kiryanov 			"run setboottypez;" \
107508a6edeSNikita Kiryanov 			"run storagebootcmd;" \
108508a6edeSNikita Kiryanov 		"fi;\0" \
109508a6edeSNikita Kiryanov 	"run_eboot=echo Starting EBOOT ...; "\
110508a6edeSNikita Kiryanov 		"mmc dev 2 && " \
111508a6edeSNikita Kiryanov 		"mmc rescan && mmc read 10042000 a 400 && go 10042000\0" \
112508a6edeSNikita Kiryanov 	"loadscript=load ${storagetype} ${storagedev} ${loadaddr} ${script};\0"\
113508a6edeSNikita Kiryanov 	"loadkernel=load ${storagetype} ${storagedev} ${loadaddr} ${kernel};\0"\
114508a6edeSNikita Kiryanov 	"loadfdt=load ${storagetype} ${storagedev} ${fdtaddr} ${dtb};\0" \
115508a6edeSNikita Kiryanov 	"bootscript=echo Running bootscript from ${storagetype} ...;" \
116508a6edeSNikita Kiryanov 		   "source ${loadaddr};\0" \
117508a6edeSNikita Kiryanov 	"nandloadkernel=nand read ${loadaddr} 0 780000;\0" \
118508a6edeSNikita Kiryanov 	"nandloadfdt=nand read ${fdtaddr} 780000 80000;\0" \
119508a6edeSNikita Kiryanov 	"setupmmcboot=setenv storagetype mmc; setenv storagedev 2;\0" \
120508a6edeSNikita Kiryanov 	"setupsataboot=setenv storagetype sata; setenv storagedev 0;\0" \
121508a6edeSNikita Kiryanov 	"setupnandboot=setenv storagetype nand;\0" \
122508a6edeSNikita Kiryanov 	"setupusbboot=setenv storagetype usb; setenv storagedev 0;\0" \
123508a6edeSNikita Kiryanov 	"storagebootcmd=echo Booting from ${storagetype} ...;" \
124508a6edeSNikita Kiryanov 			"run ${storagetype}args; run doboot;\0" \
125508a6edeSNikita Kiryanov 	"trybootk=if run loadkernel; then " \
126508a6edeSNikita Kiryanov 		"if ${doloadfdt}; then " \
127508a6edeSNikita Kiryanov 			"run loadfdt;" \
128a6b0652bSNikita Kiryanov 		"fi;" \
129508a6edeSNikita Kiryanov 		"run storagebootcmd;" \
130508a6edeSNikita Kiryanov 		"fi;\0" \
131508a6edeSNikita Kiryanov 	"trybootsmz=if run loadscript; then " \
132508a6edeSNikita Kiryanov 			"run bootscript;" \
133e32028a7SNikita Kiryanov 		"fi;" \
134508a6edeSNikita Kiryanov 		"run setboottypem;" \
135508a6edeSNikita Kiryanov 		"run trybootk;" \
136508a6edeSNikita Kiryanov 		"run setboottypez;" \
137508a6edeSNikita Kiryanov 		"run trybootk;\0"
138e32028a7SNikita Kiryanov 
139e32028a7SNikita Kiryanov #define CONFIG_BOOTCOMMAND \
140508a6edeSNikita Kiryanov 	"run setupmmcboot;" \
141508a6edeSNikita Kiryanov 	"mmc dev ${storagedev};" \
142508a6edeSNikita Kiryanov 	"if mmc rescan; then " \
143508a6edeSNikita Kiryanov 		"run trybootsmz;" \
144508a6edeSNikita Kiryanov 	"fi;" \
145508a6edeSNikita Kiryanov 	"run setupusbboot;" \
146508a6edeSNikita Kiryanov 	"if usb start; then "\
147508a6edeSNikita Kiryanov 		"if run loadscript; then " \
148508a6edeSNikita Kiryanov 			"run bootscript;" \
149508a6edeSNikita Kiryanov 		"fi;" \
150508a6edeSNikita Kiryanov 	"fi;" \
151508a6edeSNikita Kiryanov 	"run setupsataboot;" \
152508a6edeSNikita Kiryanov 	"if sata init; then " \
153508a6edeSNikita Kiryanov 		"run trybootsmz;" \
154508a6edeSNikita Kiryanov 	"fi;" \
155508a6edeSNikita Kiryanov 	"run setupnandboot;" \
156508a6edeSNikita Kiryanov 	"run nandboot;"
157e32028a7SNikita Kiryanov 
1581c2e5292SNikita Kiryanov #define CONFIG_PREBOOT		"usb start"
1591c2e5292SNikita Kiryanov 
160e32028a7SNikita Kiryanov /* SPI */
161e32028a7SNikita Kiryanov #define CONFIG_SPI
162e32028a7SNikita Kiryanov #define CONFIG_MXC_SPI
163e32028a7SNikita Kiryanov 
164a6b0652bSNikita Kiryanov /* NAND */
165a6b0652bSNikita Kiryanov #ifndef CONFIG_SPL_BUILD
166a6b0652bSNikita Kiryanov #define CONFIG_CMD_NAND
167a6b0652bSNikita Kiryanov #define CONFIG_SYS_NAND_BASE		0x40000000
168a6b0652bSNikita Kiryanov #define CONFIG_SYS_NAND_MAX_CHIPS	1
169a6b0652bSNikita Kiryanov #define CONFIG_SYS_MAX_NAND_DEVICE	1
170a6b0652bSNikita Kiryanov #define CONFIG_NAND_MXS
171a6b0652bSNikita Kiryanov #define CONFIG_SYS_NAND_ONFI_DETECTION
172a6b0652bSNikita Kiryanov /* APBH DMA is required for NAND support */
173a6b0652bSNikita Kiryanov #define CONFIG_APBH_DMA
174a6b0652bSNikita Kiryanov #define CONFIG_APBH_DMA_BURST
175a6b0652bSNikita Kiryanov #define CONFIG_APBH_DMA_BURST8
176a6b0652bSNikita Kiryanov #endif
177a6b0652bSNikita Kiryanov 
17802b1343eSNikita Kiryanov /* Ethernet */
17902b1343eSNikita Kiryanov #define CONFIG_FEC_MXC
18002b1343eSNikita Kiryanov #define CONFIG_FEC_MXC_PHYADDR		0
18102b1343eSNikita Kiryanov #define CONFIG_FEC_XCV_TYPE		RGMII
18202b1343eSNikita Kiryanov #define IMX_FEC_BASE			ENET_BASE_ADDR
18302b1343eSNikita Kiryanov #define CONFIG_PHYLIB
18402b1343eSNikita Kiryanov #define CONFIG_PHY_ATHEROS
18502b1343eSNikita Kiryanov #define CONFIG_MII
18602b1343eSNikita Kiryanov #define CONFIG_ETHPRIME			"FEC0"
18702b1343eSNikita Kiryanov #define CONFIG_ARP_TIMEOUT		200UL
18802b1343eSNikita Kiryanov #define CONFIG_NET_RETRY_COUNT		5
18902b1343eSNikita Kiryanov 
1900f3effb9SNikita Kiryanov /* USB */
1910f3effb9SNikita Kiryanov #define CONFIG_MXC_USB_PORTSC		(PORT_PTS_UTMI | PORT_PTS_PTW)
1920f3effb9SNikita Kiryanov #define CONFIG_MXC_USB_FLAGS		0
1930f3effb9SNikita Kiryanov #define CONFIG_USB_MAX_CONTROLLER_COUNT	2
1940f3effb9SNikita Kiryanov #define CONFIG_EHCI_HCD_INIT_AFTER_RESET	/* For OTG port */
1951c2e5292SNikita Kiryanov #define CONFIG_SYS_STDIO_DEREGISTER
1960f3effb9SNikita Kiryanov 
197f42b2f60SNikita Kiryanov /* I2C */
198f42b2f60SNikita Kiryanov #define CONFIG_SYS_I2C
199f42b2f60SNikita Kiryanov #define CONFIG_SYS_I2C_MXC
20003544c66SAlbert ARIBAUD \\(3ADEV\\) #define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
20103544c66SAlbert ARIBAUD \\(3ADEV\\) #define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
202f8cb101eSYork Sun #define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
203f42b2f60SNikita Kiryanov #define CONFIG_SYS_I2C_SPEED		100000
204f42b2f60SNikita Kiryanov #define CONFIG_SYS_MXC_I2C3_SPEED	400000
205f42b2f60SNikita Kiryanov 
206f42b2f60SNikita Kiryanov #define CONFIG_SYS_I2C_EEPROM_ADDR	0x50
207f42b2f60SNikita Kiryanov #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	1
208f42b2f60SNikita Kiryanov #define CONFIG_SYS_I2C_EEPROM_BUS	2
209f42b2f60SNikita Kiryanov 
210206f38f7SNikita Kiryanov /* SATA */
211206f38f7SNikita Kiryanov #define CONFIG_CMD_SATA
212206f38f7SNikita Kiryanov #define CONFIG_SYS_SATA_MAX_DEVICE	1
213206f38f7SNikita Kiryanov #define CONFIG_LIBATA
214206f38f7SNikita Kiryanov #define CONFIG_LBA48
215206f38f7SNikita Kiryanov #define CONFIG_DWC_AHSATA
216206f38f7SNikita Kiryanov #define CONFIG_DWC_AHSATA_PORT_ID	0
217206f38f7SNikita Kiryanov #define CONFIG_DWC_AHSATA_BASE_ADDR	SATA_ARB_BASE_ADDR
218206f38f7SNikita Kiryanov 
219e32028a7SNikita Kiryanov /* Boot */
220e32028a7SNikita Kiryanov #define CONFIG_SYS_BOOTMAPSZ	        (8 << 20)
221f66113c0SNikita Kiryanov #define CONFIG_SERIAL_TAG
222e32028a7SNikita Kiryanov 
223e32028a7SNikita Kiryanov /* misc */
224e32028a7SNikita Kiryanov #define CONFIG_STACKSIZE			(128 * 1024)
2259fbdcf01SNikita Kiryanov #define CONFIG_SYS_MALLOC_LEN			(10 * 1024 * 1024)
226e32028a7SNikita Kiryanov #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	800 /* 400 KB */
2277d1abb7dSNikita Kiryanov #define CONFIG_MISC_INIT_R
228e32028a7SNikita Kiryanov 
229e32028a7SNikita Kiryanov /* SPL */
230e32028a7SNikita Kiryanov #include "imx6_spl.h"
231e32028a7SNikita Kiryanov #define CONFIG_SPL_MMC_SUPPORT
232e32028a7SNikita Kiryanov #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	0x80 /* offset 64 kb */
233e32028a7SNikita Kiryanov #define CONFIG_SYS_MONITOR_LEN	(CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS / 2 * 1024)
234e32028a7SNikita Kiryanov #define CONFIG_SPL_SPI_SUPPORT
235e32028a7SNikita Kiryanov #define CONFIG_SPL_SPI_FLASH_SUPPORT
236e32028a7SNikita Kiryanov #define CONFIG_SYS_SPI_U_BOOT_OFFS	(64 * 1024)
237e32028a7SNikita Kiryanov #define CONFIG_SPL_SPI_LOAD
238e32028a7SNikita Kiryanov 
239deb94d61SNikita Kiryanov /* Display */
240deb94d61SNikita Kiryanov #define CONFIG_VIDEO
241deb94d61SNikita Kiryanov #define CONFIG_VIDEO_IPUV3
242deb94d61SNikita Kiryanov #define CONFIG_IPUV3_CLK          260000000
243deb94d61SNikita Kiryanov #define CONFIG_IMX_HDMI
244deb94d61SNikita Kiryanov #define CONFIG_CFB_CONSOLE
245deb94d61SNikita Kiryanov #define CONFIG_VGA_AS_SINGLE_DEVICE
246deb94d61SNikita Kiryanov #define CONFIG_SYS_CONSOLE_IS_IN_ENV
247deb94d61SNikita Kiryanov #define CONFIG_CONSOLE_MUX
248deb94d61SNikita Kiryanov #define CONFIG_VIDEO_SW_CURSOR
249deb94d61SNikita Kiryanov 
2503a236a35SNikita Kiryanov #define CONFIG_SPLASH_SCREEN
251f82eb2faSNikita Kiryanov #define CONFIG_SPLASH_SOURCE
2523a236a35SNikita Kiryanov #define CONFIG_CMD_BMP
2533a236a35SNikita Kiryanov #define CONFIG_VIDEO_BMP_RLE8
2543a236a35SNikita Kiryanov 
2558015dde8SNikita Kiryanov #define CONFIG_VIDEO_LOGO
2568015dde8SNikita Kiryanov #define CONFIG_VIDEO_BMP_LOGO
2578015dde8SNikita Kiryanov 
258*12616531SNikita Kiryanov /* EEPROM */
259*12616531SNikita Kiryanov #define CONFIG_CMD_EEPROM
260*12616531SNikita Kiryanov #define CONFIG_ENV_EEPROM_IS_ON_I2C
261*12616531SNikita Kiryanov #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		1
262*12616531SNikita Kiryanov #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	4
263*12616531SNikita Kiryanov #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	5
264*12616531SNikita Kiryanov #define CONFIG_SYS_EEPROM_SIZE			256
265*12616531SNikita Kiryanov 
266*12616531SNikita Kiryanov #define CONFIG_CMD_EEPROM_LAYOUT
267*12616531SNikita Kiryanov #define CONFIG_EEPROM_LAYOUT_HELP_STRING "v2, v3"
268*12616531SNikita Kiryanov 
269e32028a7SNikita Kiryanov #endif	/* __CONFIG_CM_FX6_H */
270