1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright (C) 2015 CompuLab, Ltd. 4 * 5 * Configuration settings for the CompuLab CL-SOM-iMX7 System-on-Module. 6 */ 7 8 #ifndef __CL_SOM_IMX7_CONFIG_H 9 #define __CL_SOM_IMX7_CONFIG_H 10 11 #include "mx7_common.h" 12 13 #define CONFIG_DBG_MONITOR 14 15 #define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR 16 17 /* Size of malloc() pool */ 18 #define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M) 19 20 #define CONFIG_BOARD_LATE_INIT 21 22 /* Uncomment to enable secure boot support */ 23 /* #define CONFIG_SECURE_BOOT */ 24 #define CONFIG_CSF_SIZE 0x4000 25 26 /* Network */ 27 #define CONFIG_FEC_MXC 28 #define CONFIG_FEC_XCV_TYPE RGMII 29 #define CONFIG_ETHPRIME "FEC" 30 #define CONFIG_FEC_MXC_PHYADDR 0 31 32 #define CONFIG_PHYLIB 33 #define CONFIG_PHY_ATHEROS 34 /* ENET1 */ 35 #define IMX_FEC_BASE ENET_IPS_BASE_ADDR 36 37 /* PMIC */ 38 #define CONFIG_POWER 39 #define CONFIG_POWER_I2C 40 #define CONFIG_POWER_PFUZE3000 41 #define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08 42 43 #undef CONFIG_BOOTM_NETBSD 44 #undef CONFIG_BOOTM_PLAN9 45 #undef CONFIG_BOOTM_RTEMS 46 47 /* I2C configs */ 48 #define CONFIG_SYS_I2C 49 #define CONFIG_SYS_I2C_MXC 50 #define CONFIG_SYS_I2C_MXC_I2C2 /* Enable I2C bus 2 */ 51 #define CONFIG_SYS_I2C_SPEED 100000 52 #define SYS_I2C_BUS_SOM 0 53 54 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 55 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 56 #define CONFIG_SYS_I2C_EEPROM_BUS SYS_I2C_BUS_SOM 57 58 #define CONFIG_PCA953X 59 #define CONFIG_CMD_PCA953X 60 #define CONFIG_SYS_I2C_PCA953X_ADDR 0x20 61 #define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x20, 16} } 62 63 #undef CONFIG_SYS_AUTOLOAD 64 #undef CONFIG_EXTRA_ENV_SETTINGS 65 #undef CONFIG_BOOTCOMMAND 66 67 #define CONFIG_SYS_AUTOLOAD "no" 68 69 #define CONFIG_EXTRA_ENV_SETTINGS \ 70 "autoload=off\0" \ 71 "script=boot.scr\0" \ 72 "loadscript=load ${storagetype} ${storagedev} ${loadaddr} ${script};\0" \ 73 "loadkernel=load ${storagetype} ${storagedev} ${loadaddr} ${kernel};\0" \ 74 "loadfdt=load ${storagetype} ${storagedev} ${fdtaddr} ${fdtfile};\0" \ 75 "bootscript=echo Running bootscript from ${storagetype} ...; source ${loadaddr};\0" \ 76 "storagebootcmd=echo Booting from ${storagetype} ...; run ${storagetype}args; run doboot;\0" \ 77 "kernel=zImage\0" \ 78 "console=ttymxc0\0" \ 79 "fdt_high=0xffffffff\0" \ 80 "initrd_high=0xffffffff\0" \ 81 "fdtfile=imx7d-sbc-imx7.dtb\0" \ 82 "fdtaddr=0x83000000\0" \ 83 "mmcdev_def="__stringify(CONFIG_SYS_MMC_DEV)"\0" \ 84 "usbdev_def="__stringify(CONFIG_SYS_USB_DEV)"\0" \ 85 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ 86 "usbpart=" __stringify(CONFIG_SYS_USB_IMG_LOAD_PART) "\0" \ 87 "doboot=bootz ${loadaddr} - ${fdtaddr}\0" \ 88 "mmc_config=mmc dev ${mmcdev}; mmc rescan\0" \ 89 "mmcargs=setenv bootargs console=${console},${baudrate} " \ 90 "root=/dev/mmcblk${mmcblk}p2 rootwait rw\0" \ 91 "mmcbootscript=" \ 92 "if run mmc_config; then " \ 93 "setenv storagetype mmc;" \ 94 "setenv storagedev ${mmcdev}:${mmcpart};" \ 95 "if run loadscript; then " \ 96 "run bootscript; " \ 97 "fi; " \ 98 "fi;\0" \ 99 "mmcboot=" \ 100 "if run mmc_config; then " \ 101 "setenv storagetype mmc;" \ 102 "setenv storagedev ${mmcdev}:${mmcpart};" \ 103 "if run loadkernel; then " \ 104 "if run loadfdt; then " \ 105 "run storagebootcmd;" \ 106 "fi; " \ 107 "fi; " \ 108 "fi;\0" \ 109 "sdbootscript=setenv mmcdev ${mmcdev_def}; setenv mmcblk 0; " \ 110 "run mmcbootscript\0" \ 111 "usbbootscript=setenv usbdev ${usbdev_def}; " \ 112 "setenv storagetype usb;" \ 113 "setenv storagedev ${usbdev}:${usbpart};" \ 114 "if run loadscript; then " \ 115 "run bootscript; " \ 116 "fi; " \ 117 "sdboot=setenv mmcdev ${mmcdev_def}; setenv mmcblk 0; run mmcboot\0" \ 118 "emmcbootscript=setenv mmcdev 1; setenv mmcblk 2; run mmcbootscript\0" \ 119 "emmcboot=setenv mmcdev 1; setenv mmcblk 2; run mmcboot\0" \ 120 121 #define CONFIG_BOOTCOMMAND \ 122 "echo SD boot attempt ...; run sdbootscript; run sdboot; " \ 123 "echo eMMC boot attempt ...; run emmcbootscript; run emmcboot; " \ 124 "echo USB boot attempt ...; run usbbootscript; " 125 126 #define CONFIG_SYS_MEMTEST_START 0x80000000 127 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x20000000) 128 129 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 130 #define CONFIG_SYS_HZ 1000 131 132 /* Physical Memory Map */ 133 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 134 135 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 136 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 137 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 138 139 #define CONFIG_SYS_INIT_SP_OFFSET \ 140 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 141 #define CONFIG_SYS_INIT_SP_ADDR \ 142 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 143 144 /* SPI Flash support */ 145 #define CONFIG_SF_DEFAULT_BUS 0 146 #define CONFIG_SF_DEFAULT_CS 0 147 #define CONFIG_SF_DEFAULT_SPEED 20000000 148 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) 149 150 /* FLASH and environment organization */ 151 #define CONFIG_ENV_SIZE SZ_8K 152 #define CONFIG_ENV_OFFSET (768 * 1024) 153 #define CONFIG_ENV_SECT_SIZE (64 * 1024) 154 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS 155 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS 156 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE 157 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 158 159 /* MMC Config*/ 160 #define CONFIG_FSL_USDHC 161 #ifdef CONFIG_FSL_USDHC 162 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR 163 164 #define CONFIG_SYS_FSL_USDHC_NUM 2 165 #define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USDHC1 */ 166 #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ 167 #endif 168 169 /* USB Configs */ 170 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 171 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 172 #define CONFIG_MXC_USB_FLAGS 0 173 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 174 175 /* Uncomment to enable iMX thermal driver support */ 176 /*#define CONFIG_IMX_THERMAL*/ 177 178 /* SPL */ 179 #include "imx7_spl.h" 180 #ifdef CONFIG_SPL_BUILD 181 #define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024) 182 #endif /* CONFIG_SPL_BUILD */ 183 184 #endif /* __CONFIG_H */ 185