1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright (C) 2015 CompuLab, Ltd. 4 * 5 * Configuration settings for the CompuLab CL-SOM-iMX7 System-on-Module. 6 */ 7 8 #ifndef __CL_SOM_IMX7_CONFIG_H 9 #define __CL_SOM_IMX7_CONFIG_H 10 11 #include "mx7_common.h" 12 13 #define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR 14 15 /* Size of malloc() pool */ 16 #define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M) 17 18 #define CONFIG_BOARD_LATE_INIT 19 20 /* Uncomment to enable secure boot support */ 21 /* #define CONFIG_SECURE_BOOT */ 22 #define CONFIG_CSF_SIZE 0x4000 23 24 /* Network */ 25 #define CONFIG_FEC_MXC 26 #define CONFIG_FEC_XCV_TYPE RGMII 27 #define CONFIG_ETHPRIME "FEC" 28 #define CONFIG_FEC_MXC_PHYADDR 0 29 30 #define CONFIG_PHYLIB 31 #define CONFIG_PHY_ATHEROS 32 /* ENET1 */ 33 #define IMX_FEC_BASE ENET_IPS_BASE_ADDR 34 35 /* PMIC */ 36 #define CONFIG_POWER 37 #define CONFIG_POWER_I2C 38 #define CONFIG_POWER_PFUZE3000 39 #define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08 40 41 #undef CONFIG_BOOTM_NETBSD 42 #undef CONFIG_BOOTM_PLAN9 43 #undef CONFIG_BOOTM_RTEMS 44 45 /* I2C configs */ 46 #define CONFIG_SYS_I2C 47 #define CONFIG_SYS_I2C_MXC 48 #define CONFIG_SYS_I2C_MXC_I2C2 /* Enable I2C bus 2 */ 49 #define CONFIG_SYS_I2C_SPEED 100000 50 #define SYS_I2C_BUS_SOM 0 51 52 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 53 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 54 #define CONFIG_SYS_I2C_EEPROM_BUS SYS_I2C_BUS_SOM 55 56 #define CONFIG_PCA953X 57 #define CONFIG_CMD_PCA953X 58 #define CONFIG_SYS_I2C_PCA953X_ADDR 0x20 59 #define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x20, 16} } 60 61 #undef CONFIG_SYS_AUTOLOAD 62 #undef CONFIG_EXTRA_ENV_SETTINGS 63 #undef CONFIG_BOOTCOMMAND 64 65 #define CONFIG_SYS_AUTOLOAD "no" 66 67 #define CONFIG_EXTRA_ENV_SETTINGS \ 68 "autoload=off\0" \ 69 "script=boot.scr\0" \ 70 "loadscript=load ${storagetype} ${storagedev} ${loadaddr} ${script};\0" \ 71 "loadkernel=load ${storagetype} ${storagedev} ${loadaddr} ${kernel};\0" \ 72 "loadfdt=load ${storagetype} ${storagedev} ${fdtaddr} ${fdtfile};\0" \ 73 "bootscript=echo Running bootscript from ${storagetype} ...; source ${loadaddr};\0" \ 74 "storagebootcmd=echo Booting from ${storagetype} ...; run ${storagetype}args; run doboot;\0" \ 75 "kernel=zImage\0" \ 76 "console=ttymxc0\0" \ 77 "fdt_high=0xffffffff\0" \ 78 "initrd_high=0xffffffff\0" \ 79 "fdtfile=imx7d-sbc-imx7.dtb\0" \ 80 "fdtaddr=0x83000000\0" \ 81 "mmcdev_def="__stringify(CONFIG_SYS_MMC_DEV)"\0" \ 82 "usbdev_def="__stringify(CONFIG_SYS_USB_DEV)"\0" \ 83 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ 84 "usbpart=" __stringify(CONFIG_SYS_USB_IMG_LOAD_PART) "\0" \ 85 "doboot=bootz ${loadaddr} - ${fdtaddr}\0" \ 86 "mmc_config=mmc dev ${mmcdev}; mmc rescan\0" \ 87 "mmcargs=setenv bootargs console=${console},${baudrate} " \ 88 "root=/dev/mmcblk${mmcblk}p2 rootwait rw\0" \ 89 "mmcbootscript=" \ 90 "if run mmc_config; then " \ 91 "setenv storagetype mmc;" \ 92 "setenv storagedev ${mmcdev}:${mmcpart};" \ 93 "if run loadscript; then " \ 94 "run bootscript; " \ 95 "fi; " \ 96 "fi;\0" \ 97 "mmcboot=" \ 98 "if run mmc_config; then " \ 99 "setenv storagetype mmc;" \ 100 "setenv storagedev ${mmcdev}:${mmcpart};" \ 101 "if run loadkernel; then " \ 102 "if run loadfdt; then " \ 103 "run storagebootcmd;" \ 104 "fi; " \ 105 "fi; " \ 106 "fi;\0" \ 107 "sdbootscript=setenv mmcdev ${mmcdev_def}; setenv mmcblk 0; " \ 108 "run mmcbootscript\0" \ 109 "usbbootscript=setenv usbdev ${usbdev_def}; " \ 110 "setenv storagetype usb;" \ 111 "setenv storagedev ${usbdev}:${usbpart};" \ 112 "if run loadscript; then " \ 113 "run bootscript; " \ 114 "fi; " \ 115 "sdboot=setenv mmcdev ${mmcdev_def}; setenv mmcblk 0; run mmcboot\0" \ 116 "emmcbootscript=setenv mmcdev 1; setenv mmcblk 2; run mmcbootscript\0" \ 117 "emmcboot=setenv mmcdev 1; setenv mmcblk 2; run mmcboot\0" \ 118 119 #define CONFIG_BOOTCOMMAND \ 120 "echo SD boot attempt ...; run sdbootscript; run sdboot; " \ 121 "echo eMMC boot attempt ...; run emmcbootscript; run emmcboot; " \ 122 "echo USB boot attempt ...; run usbbootscript; " 123 124 #define CONFIG_SYS_MEMTEST_START 0x80000000 125 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x20000000) 126 127 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 128 #define CONFIG_SYS_HZ 1000 129 130 /* Physical Memory Map */ 131 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 132 133 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 134 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 135 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 136 137 #define CONFIG_SYS_INIT_SP_OFFSET \ 138 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 139 #define CONFIG_SYS_INIT_SP_ADDR \ 140 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 141 142 /* SPI Flash support */ 143 144 /* FLASH and environment organization */ 145 #define CONFIG_ENV_SIZE SZ_8K 146 #define CONFIG_ENV_OFFSET (768 * 1024) 147 #define CONFIG_ENV_SECT_SIZE (64 * 1024) 148 149 /* MMC Config*/ 150 #define CONFIG_FSL_USDHC 151 #ifdef CONFIG_FSL_USDHC 152 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR 153 154 #define CONFIG_SYS_FSL_USDHC_NUM 2 155 #define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USDHC1 */ 156 #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ 157 #endif 158 159 /* USB Configs */ 160 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 161 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 162 #define CONFIG_MXC_USB_FLAGS 0 163 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 164 165 /* Uncomment to enable iMX thermal driver support */ 166 /*#define CONFIG_IMX_THERMAL*/ 167 168 /* SPL */ 169 #include "imx7_spl.h" 170 #ifdef CONFIG_SPL_BUILD 171 #define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024) 172 #endif /* CONFIG_SPL_BUILD */ 173 174 #endif /* __CONFIG_H */ 175