1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * 4 * Congatec Conga-QEVAl board configuration file. 5 * 6 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. 7 * Based on Freescale i.MX6Q Sabre Lite board configuration file. 8 * Copyright (C) 2013, Adeneo Embedded <www.adeneo-embedded.com> 9 * Leo Sartre, <lsartre@adeneo-embedded.com> 10 */ 11 12 #ifndef __CONFIG_CGTQMX6EVAL_H 13 #define __CONFIG_CGTQMX6EVAL_H 14 15 #include "mx6_common.h" 16 17 #define CONFIG_MACH_TYPE 4122 18 19 #ifdef CONFIG_SPL 20 #define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024) 21 #include "imx6_spl.h" 22 #endif 23 24 /* Size of malloc() pool */ 25 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) 26 27 #define CONFIG_MISC_INIT_R 28 29 #define CONFIG_MXC_UART 30 #define CONFIG_MXC_UART_BASE UART2_BASE 31 32 /* MMC Configs */ 33 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 34 35 /* SPI NOR */ 36 #define CONFIG_SPI_FLASH 37 #define CONFIG_SPI_FLASH_STMICRO 38 #define CONFIG_SPI_FLASH_SST 39 #define CONFIG_SF_DEFAULT_BUS 0 40 #define CONFIG_SF_DEFAULT_SPEED 20000000 41 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) 42 43 /* Thermal support */ 44 #define CONFIG_IMX_THERMAL 45 46 /* I2C Configs */ 47 #define CONFIG_SYS_I2C 48 #define CONFIG_SYS_I2C_MXC 49 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 50 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 51 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 52 #define CONFIG_SYS_I2C_SPEED 100000 53 54 /* PMIC */ 55 #define CONFIG_POWER 56 #define CONFIG_POWER_I2C 57 #define CONFIG_POWER_PFUZE100 58 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 59 60 /* USB Configs */ 61 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 62 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 63 #define CONFIG_MXC_USB_FLAGS 0 64 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 /* Enabled USB controller number */ 65 66 #define CONFIG_USBD_HS 67 68 /* Framebuffer */ 69 #define CONFIG_VIDEO_IPUV3 70 #define CONFIG_VIDEO_BMP_RLE8 71 #define CONFIG_SPLASH_SCREEN 72 #define CONFIG_SPLASH_SCREEN_ALIGN 73 #define CONFIG_BMP_16BPP 74 #define CONFIG_VIDEO_LOGO 75 #define CONFIG_VIDEO_BMP_LOGO 76 #define CONFIG_IMX_HDMI 77 78 /* SATA */ 79 #define CONFIG_SYS_SATA_MAX_DEVICE 1 80 #define CONFIG_DWC_AHSATA_PORT_ID 0 81 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR 82 #define CONFIG_LBA48 83 84 /* Ethernet */ 85 #define CONFIG_FEC_MXC 86 #define IMX_FEC_BASE ENET_BASE_ADDR 87 #define CONFIG_FEC_XCV_TYPE RGMII 88 #define CONFIG_ETHPRIME "FEC" 89 #define CONFIG_FEC_MXC_PHYADDR 6 90 #define CONFIG_PHY_ATHEROS 91 92 /* Command definition */ 93 94 #define CONFIG_MXC_UART_BASE UART2_BASE 95 #define CONSOLE_DEV "ttymxc1" 96 #define CONFIG_MMCROOT "/dev/mmcblk0p2" 97 #define CONFIG_SYS_MMC_ENV_DEV 0 98 99 #define CONFIG_EXTRA_ENV_SETTINGS \ 100 "script=boot.scr\0" \ 101 "image=zImage\0" \ 102 "fdtfile=undefined\0" \ 103 "fdt_addr_r=0x18000000\0" \ 104 "boot_fdt=try\0" \ 105 "ip_dyn=yes\0" \ 106 "console=" CONSOLE_DEV "\0" \ 107 "dfuspi=dfu 0 sf 0:0:10000000:0\0" \ 108 "dfu_alt_info_spl=spl raw 0x400\0" \ 109 "dfu_alt_info_img=u-boot raw 0x10000\0" \ 110 "dfu_alt_info=spl raw 0x400\0" \ 111 "bootm_size=0x10000000\0" \ 112 "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ 113 "mmcpart=1\0" \ 114 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ 115 "update_sd_firmware=" \ 116 "if test ${ip_dyn} = yes; then " \ 117 "setenv get_cmd dhcp; " \ 118 "else " \ 119 "setenv get_cmd tftp; " \ 120 "fi; " \ 121 "if mmc dev ${mmcdev}; then " \ 122 "if ${get_cmd} ${update_sd_firmware_filename}; then " \ 123 "setexpr fw_sz ${filesize} / 0x200; " \ 124 "setexpr fw_sz ${fw_sz} + 1; " \ 125 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \ 126 "fi; " \ 127 "fi\0" \ 128 "mmcargs=setenv bootargs console=${console},${baudrate} " \ 129 "root=${mmcroot}\0" \ 130 "loadbootscript=" \ 131 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 132 "bootscript=echo Running bootscript from mmc ...; " \ 133 "source\0" \ 134 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ 135 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr_r} ${fdtfile}\0" \ 136 "mmcboot=echo Booting from mmc ...; " \ 137 "run mmcargs; " \ 138 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 139 "if run loadfdt; then " \ 140 "bootz ${loadaddr} - ${fdt_addr_r}; " \ 141 "else " \ 142 "if test ${boot_fdt} = try; then " \ 143 "bootz; " \ 144 "else " \ 145 "echo WARN: Cannot load the DT; " \ 146 "fi; " \ 147 "fi; " \ 148 "else " \ 149 "bootz; " \ 150 "fi;\0" \ 151 "findfdt="\ 152 "if test $board_rev = MX6Q ; then " \ 153 "setenv fdtfile imx6q-qmx6.dtb; fi; " \ 154 "if test $board_rev = MX6DL ; then " \ 155 "setenv fdtfile imx6dl-qmx6.dtb; fi; " \ 156 "if test $fdtfile = undefined; then " \ 157 "echo WARNING: Could not determine dtb to use; fi; \0" \ 158 "netargs=setenv bootargs console=${console},${baudrate} " \ 159 "root=/dev/nfs " \ 160 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 161 "netboot=echo Booting from net ...; " \ 162 "run netargs; " \ 163 "if test ${ip_dyn} = yes; then " \ 164 "setenv get_cmd dhcp; " \ 165 "else " \ 166 "setenv get_cmd tftp; " \ 167 "fi; " \ 168 "${get_cmd} ${image}; " \ 169 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 170 "if ${get_cmd} ${fdt_addr_r} ${fdtfile}; then " \ 171 "bootz ${loadaddr} - ${fdt_addr_r}; " \ 172 "else " \ 173 "if test ${boot_fdt} = try; then " \ 174 "bootz; " \ 175 "else " \ 176 "echo WARN: Cannot load the DT; " \ 177 "fi; " \ 178 "fi; " \ 179 "else " \ 180 "bootz; " \ 181 "fi;\0" \ 182 "spilock=sf probe && sf protect lock 0x3f0000 0x10000;"\ 183 184 #define CONFIG_BOOTCOMMAND \ 185 "run spilock;" \ 186 "run findfdt; " \ 187 "mmc dev ${mmcdev};" \ 188 "if mmc rescan; then " \ 189 "if run loadbootscript; then " \ 190 "run bootscript; " \ 191 "else " \ 192 "if run loadimage; then " \ 193 "run mmcboot; " \ 194 "else run netboot; " \ 195 "fi; " \ 196 "fi; " \ 197 "else run netboot; fi" 198 199 #define CONFIG_SYS_MEMTEST_START 0x10000000 200 #define CONFIG_SYS_MEMTEST_END 0x10010000 201 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 202 203 /* Physical Memory Map */ 204 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 205 206 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 207 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 208 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 209 210 #define CONFIG_SYS_INIT_SP_OFFSET \ 211 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 212 #define CONFIG_SYS_INIT_SP_ADDR \ 213 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 214 215 /* Environment organization */ 216 #if defined (CONFIG_ENV_IS_IN_MMC) 217 #define CONFIG_ENV_OFFSET (6 * 64 * 1024) 218 #define CONFIG_SYS_MMC_ENV_DEV 0 219 #endif 220 221 #define CONFIG_ENV_SIZE (8 * 1024) 222 223 #if defined(CONFIG_ENV_IS_IN_SPI_FLASH) 224 #define CONFIG_ENV_OFFSET (768 * 1024) 225 #define CONFIG_ENV_SECT_SIZE (64 * 1024) 226 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS 227 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS 228 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE 229 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 230 #endif 231 232 #endif /* __CONFIG_CGTQMX6EVAL_H */ 233