1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * 4 * Congatec Conga-QEVAl board configuration file. 5 * 6 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. 7 * Based on Freescale i.MX6Q Sabre Lite board configuration file. 8 * Copyright (C) 2013, Adeneo Embedded <www.adeneo-embedded.com> 9 * Leo Sartre, <lsartre@adeneo-embedded.com> 10 */ 11 12 #ifndef __CONFIG_CGTQMX6EVAL_H 13 #define __CONFIG_CGTQMX6EVAL_H 14 15 #include "mx6_common.h" 16 17 #define CONFIG_MACH_TYPE 4122 18 19 #ifdef CONFIG_SPL 20 #define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024) 21 #include "imx6_spl.h" 22 #endif 23 24 /* Size of malloc() pool */ 25 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) 26 27 #define CONFIG_MXC_UART 28 #define CONFIG_MXC_UART_BASE UART2_BASE 29 30 /* MMC Configs */ 31 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 32 33 /* SPI NOR */ 34 #define CONFIG_SPI_FLASH 35 #define CONFIG_SPI_FLASH_STMICRO 36 #define CONFIG_SPI_FLASH_SST 37 #define CONFIG_SF_DEFAULT_BUS 0 38 #define CONFIG_SF_DEFAULT_SPEED 20000000 39 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) 40 41 /* Thermal support */ 42 #define CONFIG_IMX_THERMAL 43 44 /* I2C Configs */ 45 #define CONFIG_SYS_I2C 46 #define CONFIG_SYS_I2C_MXC 47 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 48 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 49 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 50 #define CONFIG_SYS_I2C_SPEED 100000 51 52 /* PMIC */ 53 #define CONFIG_POWER 54 #define CONFIG_POWER_I2C 55 #define CONFIG_POWER_PFUZE100 56 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 57 58 /* USB Configs */ 59 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 60 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 61 #define CONFIG_MXC_USB_FLAGS 0 62 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 /* Enabled USB controller number */ 63 64 #define CONFIG_USBD_HS 65 66 /* Framebuffer */ 67 #define CONFIG_VIDEO_IPUV3 68 #define CONFIG_VIDEO_BMP_RLE8 69 #define CONFIG_SPLASH_SCREEN 70 #define CONFIG_SPLASH_SCREEN_ALIGN 71 #define CONFIG_BMP_16BPP 72 #define CONFIG_VIDEO_LOGO 73 #define CONFIG_VIDEO_BMP_LOGO 74 #define CONFIG_IMX_HDMI 75 76 /* SATA */ 77 #define CONFIG_SYS_SATA_MAX_DEVICE 1 78 #define CONFIG_DWC_AHSATA_PORT_ID 0 79 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR 80 #define CONFIG_LBA48 81 82 /* Ethernet */ 83 #define CONFIG_FEC_MXC 84 #define IMX_FEC_BASE ENET_BASE_ADDR 85 #define CONFIG_FEC_XCV_TYPE RGMII 86 #define CONFIG_ETHPRIME "FEC" 87 #define CONFIG_FEC_MXC_PHYADDR 6 88 #define CONFIG_PHY_ATHEROS 89 90 /* Command definition */ 91 92 #define CONFIG_MXC_UART_BASE UART2_BASE 93 #define CONSOLE_DEV "ttymxc1" 94 #define CONFIG_MMCROOT "/dev/mmcblk0p2" 95 #define CONFIG_SYS_MMC_ENV_DEV 0 96 97 #define CONFIG_EXTRA_ENV_SETTINGS \ 98 "script=boot.scr\0" \ 99 "image=zImage\0" \ 100 "fdtfile=undefined\0" \ 101 "fdt_addr_r=0x18000000\0" \ 102 "boot_fdt=try\0" \ 103 "ip_dyn=yes\0" \ 104 "console=" CONSOLE_DEV "\0" \ 105 "dfuspi=dfu 0 sf 0:0:10000000:0\0" \ 106 "dfu_alt_info_spl=spl raw 0x400\0" \ 107 "dfu_alt_info_img=u-boot raw 0x10000\0" \ 108 "dfu_alt_info=spl raw 0x400\0" \ 109 "bootm_size=0x10000000\0" \ 110 "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ 111 "mmcpart=1\0" \ 112 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ 113 "update_sd_firmware=" \ 114 "if test ${ip_dyn} = yes; then " \ 115 "setenv get_cmd dhcp; " \ 116 "else " \ 117 "setenv get_cmd tftp; " \ 118 "fi; " \ 119 "if mmc dev ${mmcdev}; then " \ 120 "if ${get_cmd} ${update_sd_firmware_filename}; then " \ 121 "setexpr fw_sz ${filesize} / 0x200; " \ 122 "setexpr fw_sz ${fw_sz} + 1; " \ 123 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \ 124 "fi; " \ 125 "fi\0" \ 126 "mmcargs=setenv bootargs console=${console},${baudrate} " \ 127 "root=${mmcroot}\0" \ 128 "loadbootscript=" \ 129 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 130 "bootscript=echo Running bootscript from mmc ...; " \ 131 "source\0" \ 132 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ 133 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr_r} ${fdtfile}\0" \ 134 "mmcboot=echo Booting from mmc ...; " \ 135 "run mmcargs; " \ 136 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 137 "if run loadfdt; then " \ 138 "bootz ${loadaddr} - ${fdt_addr_r}; " \ 139 "else " \ 140 "if test ${boot_fdt} = try; then " \ 141 "bootz; " \ 142 "else " \ 143 "echo WARN: Cannot load the DT; " \ 144 "fi; " \ 145 "fi; " \ 146 "else " \ 147 "bootz; " \ 148 "fi;\0" \ 149 "findfdt="\ 150 "if test $board_rev = MX6Q ; then " \ 151 "setenv fdtfile imx6q-qmx6.dtb; fi; " \ 152 "if test $board_rev = MX6DL ; then " \ 153 "setenv fdtfile imx6dl-qmx6.dtb; fi; " \ 154 "if test $fdtfile = undefined; then " \ 155 "echo WARNING: Could not determine dtb to use; fi; \0" \ 156 "netargs=setenv bootargs console=${console},${baudrate} " \ 157 "root=/dev/nfs " \ 158 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 159 "netboot=echo Booting from net ...; " \ 160 "run netargs; " \ 161 "if test ${ip_dyn} = yes; then " \ 162 "setenv get_cmd dhcp; " \ 163 "else " \ 164 "setenv get_cmd tftp; " \ 165 "fi; " \ 166 "${get_cmd} ${image}; " \ 167 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 168 "if ${get_cmd} ${fdt_addr_r} ${fdtfile}; then " \ 169 "bootz ${loadaddr} - ${fdt_addr_r}; " \ 170 "else " \ 171 "if test ${boot_fdt} = try; then " \ 172 "bootz; " \ 173 "else " \ 174 "echo WARN: Cannot load the DT; " \ 175 "fi; " \ 176 "fi; " \ 177 "else " \ 178 "bootz; " \ 179 "fi;\0" \ 180 "spilock=sf probe && sf protect lock 0x3f0000 0x10000;"\ 181 182 #define CONFIG_BOOTCOMMAND \ 183 "run spilock;" \ 184 "run findfdt; " \ 185 "mmc dev ${mmcdev};" \ 186 "if mmc rescan; then " \ 187 "if run loadbootscript; then " \ 188 "run bootscript; " \ 189 "else " \ 190 "if run loadimage; then " \ 191 "run mmcboot; " \ 192 "else run netboot; " \ 193 "fi; " \ 194 "fi; " \ 195 "else run netboot; fi" 196 197 #define CONFIG_SYS_MEMTEST_START 0x10000000 198 #define CONFIG_SYS_MEMTEST_END 0x10010000 199 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 200 201 /* Physical Memory Map */ 202 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 203 204 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 205 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 206 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 207 208 #define CONFIG_SYS_INIT_SP_OFFSET \ 209 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 210 #define CONFIG_SYS_INIT_SP_ADDR \ 211 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 212 213 /* Environment organization */ 214 #if defined (CONFIG_ENV_IS_IN_MMC) 215 #define CONFIG_ENV_OFFSET (6 * 64 * 1024) 216 #define CONFIG_SYS_MMC_ENV_DEV 0 217 #endif 218 219 #define CONFIG_ENV_SIZE (8 * 1024) 220 221 #if defined(CONFIG_ENV_IS_IN_SPI_FLASH) 222 #define CONFIG_ENV_OFFSET (768 * 1024) 223 #define CONFIG_ENV_SECT_SIZE (64 * 1024) 224 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS 225 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS 226 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE 227 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 228 #endif 229 230 #endif /* __CONFIG_CGTQMX6EVAL_H */ 231