1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * 4 * Congatec Conga-QEVAl board configuration file. 5 * 6 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. 7 * Based on Freescale i.MX6Q Sabre Lite board configuration file. 8 * Copyright (C) 2013, Adeneo Embedded <www.adeneo-embedded.com> 9 * Leo Sartre, <lsartre@adeneo-embedded.com> 10 */ 11 12 #ifndef __CONFIG_CGTQMX6EVAL_H 13 #define __CONFIG_CGTQMX6EVAL_H 14 15 #include "mx6_common.h" 16 17 #define CONFIG_MACH_TYPE 4122 18 19 #ifdef CONFIG_SPL 20 #define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024) 21 #include "imx6_spl.h" 22 #endif 23 24 /* Size of malloc() pool */ 25 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) 26 27 #define CONFIG_MISC_INIT_R 28 29 #define CONFIG_MXC_UART 30 #define CONFIG_MXC_UART_BASE UART2_BASE 31 32 /* MMC Configs */ 33 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 34 35 /* SPI NOR */ 36 #define CONFIG_SPI_FLASH 37 #define CONFIG_SPI_FLASH_STMICRO 38 #define CONFIG_SPI_FLASH_SST 39 #define CONFIG_SF_DEFAULT_BUS 0 40 #define CONFIG_SF_DEFAULT_SPEED 20000000 41 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) 42 43 /* Thermal support */ 44 #define CONFIG_IMX_THERMAL 45 46 /* I2C Configs */ 47 #define CONFIG_SYS_I2C 48 #define CONFIG_SYS_I2C_MXC 49 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 50 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 51 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 52 #define CONFIG_SYS_I2C_SPEED 100000 53 54 /* PMIC */ 55 #define CONFIG_POWER 56 #define CONFIG_POWER_I2C 57 #define CONFIG_POWER_PFUZE100 58 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 59 60 /* USB Configs */ 61 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 62 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 63 #define CONFIG_MXC_USB_FLAGS 0 64 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 /* Enabled USB controller number */ 65 66 #define CONFIG_USBD_HS 67 68 /* Framebuffer */ 69 #define CONFIG_VIDEO_IPUV3 70 #define CONFIG_VIDEO_BMP_RLE8 71 #define CONFIG_SPLASH_SCREEN 72 #define CONFIG_SPLASH_SCREEN_ALIGN 73 #define CONFIG_BMP_16BPP 74 #define CONFIG_VIDEO_LOGO 75 #define CONFIG_VIDEO_BMP_LOGO 76 #define CONFIG_IMX_HDMI 77 78 /* SATA */ 79 #define CONFIG_SYS_SATA_MAX_DEVICE 1 80 #define CONFIG_DWC_AHSATA_PORT_ID 0 81 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR 82 #define CONFIG_LBA48 83 84 /* Ethernet */ 85 #define CONFIG_FEC_MXC 86 #define CONFIG_MII 87 #define IMX_FEC_BASE ENET_BASE_ADDR 88 #define CONFIG_FEC_XCV_TYPE RGMII 89 #define CONFIG_ETHPRIME "FEC" 90 #define CONFIG_FEC_MXC_PHYADDR 6 91 #define CONFIG_PHY_ATHEROS 92 93 /* Command definition */ 94 95 #define CONFIG_MXC_UART_BASE UART2_BASE 96 #define CONSOLE_DEV "ttymxc1" 97 #define CONFIG_MMCROOT "/dev/mmcblk0p2" 98 #define CONFIG_SYS_MMC_ENV_DEV 0 99 100 #define CONFIG_EXTRA_ENV_SETTINGS \ 101 "script=boot.scr\0" \ 102 "image=zImage\0" \ 103 "fdtfile=undefined\0" \ 104 "fdt_addr_r=0x18000000\0" \ 105 "boot_fdt=try\0" \ 106 "ip_dyn=yes\0" \ 107 "console=" CONSOLE_DEV "\0" \ 108 "dfuspi=dfu 0 sf 0:0:10000000:0\0" \ 109 "dfu_alt_info_spl=spl raw 0x400\0" \ 110 "dfu_alt_info_img=u-boot raw 0x10000\0" \ 111 "dfu_alt_info=spl raw 0x400\0" \ 112 "bootm_size=0x10000000\0" \ 113 "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ 114 "mmcpart=1\0" \ 115 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ 116 "update_sd_firmware=" \ 117 "if test ${ip_dyn} = yes; then " \ 118 "setenv get_cmd dhcp; " \ 119 "else " \ 120 "setenv get_cmd tftp; " \ 121 "fi; " \ 122 "if mmc dev ${mmcdev}; then " \ 123 "if ${get_cmd} ${update_sd_firmware_filename}; then " \ 124 "setexpr fw_sz ${filesize} / 0x200; " \ 125 "setexpr fw_sz ${fw_sz} + 1; " \ 126 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \ 127 "fi; " \ 128 "fi\0" \ 129 "mmcargs=setenv bootargs console=${console},${baudrate} " \ 130 "root=${mmcroot}\0" \ 131 "loadbootscript=" \ 132 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 133 "bootscript=echo Running bootscript from mmc ...; " \ 134 "source\0" \ 135 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ 136 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr_r} ${fdtfile}\0" \ 137 "mmcboot=echo Booting from mmc ...; " \ 138 "run mmcargs; " \ 139 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 140 "if run loadfdt; then " \ 141 "bootz ${loadaddr} - ${fdt_addr_r}; " \ 142 "else " \ 143 "if test ${boot_fdt} = try; then " \ 144 "bootz; " \ 145 "else " \ 146 "echo WARN: Cannot load the DT; " \ 147 "fi; " \ 148 "fi; " \ 149 "else " \ 150 "bootz; " \ 151 "fi;\0" \ 152 "findfdt="\ 153 "if test $board_rev = MX6Q ; then " \ 154 "setenv fdtfile imx6q-qmx6.dtb; fi; " \ 155 "if test $board_rev = MX6DL ; then " \ 156 "setenv fdtfile imx6dl-qmx6.dtb; fi; " \ 157 "if test $fdtfile = undefined; then " \ 158 "echo WARNING: Could not determine dtb to use; fi; \0" \ 159 "netargs=setenv bootargs console=${console},${baudrate} " \ 160 "root=/dev/nfs " \ 161 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 162 "netboot=echo Booting from net ...; " \ 163 "run netargs; " \ 164 "if test ${ip_dyn} = yes; then " \ 165 "setenv get_cmd dhcp; " \ 166 "else " \ 167 "setenv get_cmd tftp; " \ 168 "fi; " \ 169 "${get_cmd} ${image}; " \ 170 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 171 "if ${get_cmd} ${fdt_addr_r} ${fdtfile}; then " \ 172 "bootz ${loadaddr} - ${fdt_addr_r}; " \ 173 "else " \ 174 "if test ${boot_fdt} = try; then " \ 175 "bootz; " \ 176 "else " \ 177 "echo WARN: Cannot load the DT; " \ 178 "fi; " \ 179 "fi; " \ 180 "else " \ 181 "bootz; " \ 182 "fi;\0" \ 183 "spilock=sf probe && sf protect lock 0x3f0000 0x10000;"\ 184 185 #define CONFIG_BOOTCOMMAND \ 186 "run spilock;" \ 187 "run findfdt; " \ 188 "mmc dev ${mmcdev};" \ 189 "if mmc rescan; then " \ 190 "if run loadbootscript; then " \ 191 "run bootscript; " \ 192 "else " \ 193 "if run loadimage; then " \ 194 "run mmcboot; " \ 195 "else run netboot; " \ 196 "fi; " \ 197 "fi; " \ 198 "else run netboot; fi" 199 200 #define CONFIG_SYS_MEMTEST_START 0x10000000 201 #define CONFIG_SYS_MEMTEST_END 0x10010000 202 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 203 204 /* Physical Memory Map */ 205 #define CONFIG_NR_DRAM_BANKS 1 206 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 207 208 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 209 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 210 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 211 212 #define CONFIG_SYS_INIT_SP_OFFSET \ 213 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 214 #define CONFIG_SYS_INIT_SP_ADDR \ 215 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 216 217 /* Environment organization */ 218 #if defined (CONFIG_ENV_IS_IN_MMC) 219 #define CONFIG_ENV_OFFSET (6 * 64 * 1024) 220 #define CONFIG_SYS_MMC_ENV_DEV 0 221 #endif 222 223 #define CONFIG_ENV_SIZE (8 * 1024) 224 225 #if defined(CONFIG_ENV_IS_IN_SPI_FLASH) 226 #define CONFIG_ENV_OFFSET (768 * 1024) 227 #define CONFIG_ENV_SECT_SIZE (64 * 1024) 228 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS 229 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS 230 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE 231 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 232 #endif 233 234 #endif /* __CONFIG_CGTQMX6EVAL_H */ 235