1 /* 2 * 3 * Congatec Conga-QEVAl board configuration file. 4 * 5 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. 6 * Based on Freescale i.MX6Q Sabre Lite board configuration file. 7 * Copyright (C) 2013, Adeneo Embedded <www.adeneo-embedded.com> 8 * Leo Sartre, <lsartre@adeneo-embedded.com> 9 * 10 * SPDX-License-Identifier: GPL-2.0+ 11 */ 12 13 #ifndef __CONFIG_CGTQMX6EVAL_H 14 #define __CONFIG_CGTQMX6EVAL_H 15 16 #include "mx6_common.h" 17 18 #define CONFIG_MACH_TYPE 4122 19 20 #ifdef CONFIG_SPL 21 #define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024) 22 #define CONFIG_SPL_SPI_LOAD 23 #include "imx6_spl.h" 24 #endif 25 26 /* Size of malloc() pool */ 27 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) 28 29 #define CONFIG_MISC_INIT_R 30 31 #define CONFIG_MXC_UART 32 #define CONFIG_MXC_UART_BASE UART2_BASE 33 34 /* MMC Configs */ 35 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 36 37 /* SPI NOR */ 38 #define CONFIG_SPI_FLASH 39 #define CONFIG_SPI_FLASH_STMICRO 40 #define CONFIG_SPI_FLASH_SST 41 #define CONFIG_MXC_SPI 42 #define CONFIG_SF_DEFAULT_BUS 0 43 #define CONFIG_SF_DEFAULT_SPEED 20000000 44 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) 45 46 /* Thermal support */ 47 #define CONFIG_IMX_THERMAL 48 49 /* I2C Configs */ 50 #define CONFIG_SYS_I2C 51 #define CONFIG_SYS_I2C_MXC 52 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 53 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 54 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 55 #define CONFIG_SYS_I2C_SPEED 100000 56 57 /* PMIC */ 58 #define CONFIG_POWER 59 #define CONFIG_POWER_I2C 60 #define CONFIG_POWER_PFUZE100 61 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 62 63 /* USB Configs */ 64 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 65 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 66 #define CONFIG_MXC_USB_FLAGS 0 67 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 /* Enabled USB controller number */ 68 69 #define CONFIG_USBD_HS 70 71 #define CONFIG_USB_FUNCTION_MASS_STORAGE 72 73 /* Framebuffer */ 74 #define CONFIG_VIDEO_IPUV3 75 #define CONFIG_VIDEO_BMP_RLE8 76 #define CONFIG_SPLASH_SCREEN 77 #define CONFIG_SPLASH_SCREEN_ALIGN 78 #define CONFIG_BMP_16BPP 79 #define CONFIG_VIDEO_LOGO 80 #define CONFIG_VIDEO_BMP_LOGO 81 #define CONFIG_IMX_HDMI 82 83 /* SATA */ 84 #define CONFIG_SYS_SATA_MAX_DEVICE 1 85 #define CONFIG_DWC_AHSATA_PORT_ID 0 86 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR 87 #define CONFIG_LBA48 88 89 /* Ethernet */ 90 #define CONFIG_FEC_MXC 91 #define CONFIG_MII 92 #define IMX_FEC_BASE ENET_BASE_ADDR 93 #define CONFIG_FEC_XCV_TYPE RGMII 94 #define CONFIG_ETHPRIME "FEC" 95 #define CONFIG_FEC_MXC_PHYADDR 6 96 #define CONFIG_PHY_ATHEROS 97 98 /* Command definition */ 99 100 #define CONFIG_MXC_UART_BASE UART2_BASE 101 #define CONSOLE_DEV "ttymxc1" 102 #define CONFIG_MMCROOT "/dev/mmcblk0p2" 103 #define CONFIG_SYS_MMC_ENV_DEV 0 104 105 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG 106 #define CONFIG_EXTRA_ENV_SETTINGS \ 107 "script=boot.scr\0" \ 108 "image=zImage\0" \ 109 "fdtfile=undefined\0" \ 110 "fdt_addr_r=0x18000000\0" \ 111 "boot_fdt=try\0" \ 112 "ip_dyn=yes\0" \ 113 "console=" CONSOLE_DEV "\0" \ 114 "dfuspi=dfu 0 sf 0:0:10000000:0\0" \ 115 "dfu_alt_info_spl=spl raw 0x400\0" \ 116 "dfu_alt_info_img=u-boot raw 0x10000\0" \ 117 "dfu_alt_info=spl raw 0x400\0" \ 118 "bootm_size=0x10000000\0" \ 119 "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ 120 "mmcpart=1\0" \ 121 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ 122 "update_sd_firmware=" \ 123 "if test ${ip_dyn} = yes; then " \ 124 "setenv get_cmd dhcp; " \ 125 "else " \ 126 "setenv get_cmd tftp; " \ 127 "fi; " \ 128 "if mmc dev ${mmcdev}; then " \ 129 "if ${get_cmd} ${update_sd_firmware_filename}; then " \ 130 "setexpr fw_sz ${filesize} / 0x200; " \ 131 "setexpr fw_sz ${fw_sz} + 1; " \ 132 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \ 133 "fi; " \ 134 "fi\0" \ 135 "mmcargs=setenv bootargs console=${console},${baudrate} " \ 136 "root=${mmcroot}\0" \ 137 "loadbootscript=" \ 138 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 139 "bootscript=echo Running bootscript from mmc ...; " \ 140 "source\0" \ 141 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ 142 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr_r} ${fdtfile}\0" \ 143 "mmcboot=echo Booting from mmc ...; " \ 144 "run mmcargs; " \ 145 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 146 "if run loadfdt; then " \ 147 "bootz ${loadaddr} - ${fdt_addr_r}; " \ 148 "else " \ 149 "if test ${boot_fdt} = try; then " \ 150 "bootz; " \ 151 "else " \ 152 "echo WARN: Cannot load the DT; " \ 153 "fi; " \ 154 "fi; " \ 155 "else " \ 156 "bootz; " \ 157 "fi;\0" \ 158 "findfdt="\ 159 "if test $board_rev = MX6Q ; then " \ 160 "setenv fdtfile imx6q-qmx6.dtb; fi; " \ 161 "if test $board_rev = MX6DL ; then " \ 162 "setenv fdtfile imx6dl-qmx6.dtb; fi; " \ 163 "if test $fdtfile = undefined; then " \ 164 "echo WARNING: Could not determine dtb to use; fi; \0" \ 165 "netargs=setenv bootargs console=${console},${baudrate} " \ 166 "root=/dev/nfs " \ 167 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 168 "netboot=echo Booting from net ...; " \ 169 "run netargs; " \ 170 "if test ${ip_dyn} = yes; then " \ 171 "setenv get_cmd dhcp; " \ 172 "else " \ 173 "setenv get_cmd tftp; " \ 174 "fi; " \ 175 "${get_cmd} ${image}; " \ 176 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 177 "if ${get_cmd} ${fdt_addr_r} ${fdtfile}; then " \ 178 "bootz ${loadaddr} - ${fdt_addr_r}; " \ 179 "else " \ 180 "if test ${boot_fdt} = try; then " \ 181 "bootz; " \ 182 "else " \ 183 "echo WARN: Cannot load the DT; " \ 184 "fi; " \ 185 "fi; " \ 186 "else " \ 187 "bootz; " \ 188 "fi;\0" \ 189 "spilock=sf probe && sf protect lock 0x3f0000 0x10000;"\ 190 191 #define CONFIG_BOOTCOMMAND \ 192 "run spilock;" \ 193 "run findfdt; " \ 194 "mmc dev ${mmcdev};" \ 195 "if mmc rescan; then " \ 196 "if run loadbootscript; then " \ 197 "run bootscript; " \ 198 "else " \ 199 "if run loadimage; then " \ 200 "run mmcboot; " \ 201 "else run netboot; " \ 202 "fi; " \ 203 "fi; " \ 204 "else run netboot; fi" 205 206 #define CONFIG_SYS_MEMTEST_START 0x10000000 207 #define CONFIG_SYS_MEMTEST_END 0x10010000 208 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 209 210 /* Physical Memory Map */ 211 #define CONFIG_NR_DRAM_BANKS 1 212 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 213 214 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 215 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 216 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 217 218 #define CONFIG_SYS_INIT_SP_OFFSET \ 219 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 220 #define CONFIG_SYS_INIT_SP_ADDR \ 221 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 222 223 /* Environment organization */ 224 #if defined (CONFIG_ENV_IS_IN_MMC) 225 #define CONFIG_ENV_OFFSET (6 * 64 * 1024) 226 #define CONFIG_SYS_MMC_ENV_DEV 0 227 #endif 228 229 #define CONFIG_ENV_SIZE (8 * 1024) 230 231 #if defined(CONFIG_ENV_IS_IN_SPI_FLASH) 232 #define CONFIG_ENV_OFFSET (768 * 1024) 233 #define CONFIG_ENV_SECT_SIZE (64 * 1024) 234 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS 235 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS 236 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE 237 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 238 #endif 239 240 #endif /* __CONFIG_CGTQMX6EVAL_H */ 241