1 /* 2 * 3 * Congatec Conga-QEVAl board configuration file. 4 * 5 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. 6 * Based on Freescale i.MX6Q Sabre Lite board configuration file. 7 * Copyright (C) 2013, Adeneo Embedded <www.adeneo-embedded.com> 8 * Leo Sartre, <lsartre@adeneo-embedded.com> 9 * 10 * SPDX-License-Identifier: GPL-2.0+ 11 */ 12 13 #ifndef __CONFIG_CGTQMX6EVAL_H 14 #define __CONFIG_CGTQMX6EVAL_H 15 16 #include "mx6_common.h" 17 18 #define CONFIG_MACH_TYPE 4122 19 20 #ifdef CONFIG_SPL 21 #define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024) 22 #include "imx6_spl.h" 23 #endif 24 25 /* Size of malloc() pool */ 26 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) 27 28 #define CONFIG_MISC_INIT_R 29 30 #define CONFIG_MXC_UART 31 #define CONFIG_MXC_UART_BASE UART2_BASE 32 33 /* MMC Configs */ 34 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 35 36 /* SPI NOR */ 37 #define CONFIG_SPI_FLASH 38 #define CONFIG_SPI_FLASH_STMICRO 39 #define CONFIG_SPI_FLASH_SST 40 #define CONFIG_SF_DEFAULT_BUS 0 41 #define CONFIG_SF_DEFAULT_SPEED 20000000 42 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) 43 44 /* Thermal support */ 45 #define CONFIG_IMX_THERMAL 46 47 /* I2C Configs */ 48 #define CONFIG_SYS_I2C 49 #define CONFIG_SYS_I2C_MXC 50 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 51 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 52 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 53 #define CONFIG_SYS_I2C_SPEED 100000 54 55 /* PMIC */ 56 #define CONFIG_POWER 57 #define CONFIG_POWER_I2C 58 #define CONFIG_POWER_PFUZE100 59 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 60 61 /* USB Configs */ 62 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 63 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 64 #define CONFIG_MXC_USB_FLAGS 0 65 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 /* Enabled USB controller number */ 66 67 #define CONFIG_USBD_HS 68 69 /* Framebuffer */ 70 #define CONFIG_VIDEO_IPUV3 71 #define CONFIG_VIDEO_BMP_RLE8 72 #define CONFIG_SPLASH_SCREEN 73 #define CONFIG_SPLASH_SCREEN_ALIGN 74 #define CONFIG_BMP_16BPP 75 #define CONFIG_VIDEO_LOGO 76 #define CONFIG_VIDEO_BMP_LOGO 77 #define CONFIG_IMX_HDMI 78 79 /* SATA */ 80 #define CONFIG_SYS_SATA_MAX_DEVICE 1 81 #define CONFIG_DWC_AHSATA_PORT_ID 0 82 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR 83 #define CONFIG_LBA48 84 85 /* Ethernet */ 86 #define CONFIG_FEC_MXC 87 #define CONFIG_MII 88 #define IMX_FEC_BASE ENET_BASE_ADDR 89 #define CONFIG_FEC_XCV_TYPE RGMII 90 #define CONFIG_ETHPRIME "FEC" 91 #define CONFIG_FEC_MXC_PHYADDR 6 92 #define CONFIG_PHY_ATHEROS 93 94 /* Command definition */ 95 96 #define CONFIG_MXC_UART_BASE UART2_BASE 97 #define CONSOLE_DEV "ttymxc1" 98 #define CONFIG_MMCROOT "/dev/mmcblk0p2" 99 #define CONFIG_SYS_MMC_ENV_DEV 0 100 101 #define CONFIG_EXTRA_ENV_SETTINGS \ 102 "script=boot.scr\0" \ 103 "image=zImage\0" \ 104 "fdtfile=undefined\0" \ 105 "fdt_addr_r=0x18000000\0" \ 106 "boot_fdt=try\0" \ 107 "ip_dyn=yes\0" \ 108 "console=" CONSOLE_DEV "\0" \ 109 "dfuspi=dfu 0 sf 0:0:10000000:0\0" \ 110 "dfu_alt_info_spl=spl raw 0x400\0" \ 111 "dfu_alt_info_img=u-boot raw 0x10000\0" \ 112 "dfu_alt_info=spl raw 0x400\0" \ 113 "bootm_size=0x10000000\0" \ 114 "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ 115 "mmcpart=1\0" \ 116 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ 117 "update_sd_firmware=" \ 118 "if test ${ip_dyn} = yes; then " \ 119 "setenv get_cmd dhcp; " \ 120 "else " \ 121 "setenv get_cmd tftp; " \ 122 "fi; " \ 123 "if mmc dev ${mmcdev}; then " \ 124 "if ${get_cmd} ${update_sd_firmware_filename}; then " \ 125 "setexpr fw_sz ${filesize} / 0x200; " \ 126 "setexpr fw_sz ${fw_sz} + 1; " \ 127 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \ 128 "fi; " \ 129 "fi\0" \ 130 "mmcargs=setenv bootargs console=${console},${baudrate} " \ 131 "root=${mmcroot}\0" \ 132 "loadbootscript=" \ 133 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 134 "bootscript=echo Running bootscript from mmc ...; " \ 135 "source\0" \ 136 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ 137 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr_r} ${fdtfile}\0" \ 138 "mmcboot=echo Booting from mmc ...; " \ 139 "run mmcargs; " \ 140 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 141 "if run loadfdt; then " \ 142 "bootz ${loadaddr} - ${fdt_addr_r}; " \ 143 "else " \ 144 "if test ${boot_fdt} = try; then " \ 145 "bootz; " \ 146 "else " \ 147 "echo WARN: Cannot load the DT; " \ 148 "fi; " \ 149 "fi; " \ 150 "else " \ 151 "bootz; " \ 152 "fi;\0" \ 153 "findfdt="\ 154 "if test $board_rev = MX6Q ; then " \ 155 "setenv fdtfile imx6q-qmx6.dtb; fi; " \ 156 "if test $board_rev = MX6DL ; then " \ 157 "setenv fdtfile imx6dl-qmx6.dtb; fi; " \ 158 "if test $fdtfile = undefined; then " \ 159 "echo WARNING: Could not determine dtb to use; fi; \0" \ 160 "netargs=setenv bootargs console=${console},${baudrate} " \ 161 "root=/dev/nfs " \ 162 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 163 "netboot=echo Booting from net ...; " \ 164 "run netargs; " \ 165 "if test ${ip_dyn} = yes; then " \ 166 "setenv get_cmd dhcp; " \ 167 "else " \ 168 "setenv get_cmd tftp; " \ 169 "fi; " \ 170 "${get_cmd} ${image}; " \ 171 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 172 "if ${get_cmd} ${fdt_addr_r} ${fdtfile}; then " \ 173 "bootz ${loadaddr} - ${fdt_addr_r}; " \ 174 "else " \ 175 "if test ${boot_fdt} = try; then " \ 176 "bootz; " \ 177 "else " \ 178 "echo WARN: Cannot load the DT; " \ 179 "fi; " \ 180 "fi; " \ 181 "else " \ 182 "bootz; " \ 183 "fi;\0" \ 184 "spilock=sf probe && sf protect lock 0x3f0000 0x10000;"\ 185 186 #define CONFIG_BOOTCOMMAND \ 187 "run spilock;" \ 188 "run findfdt; " \ 189 "mmc dev ${mmcdev};" \ 190 "if mmc rescan; then " \ 191 "if run loadbootscript; then " \ 192 "run bootscript; " \ 193 "else " \ 194 "if run loadimage; then " \ 195 "run mmcboot; " \ 196 "else run netboot; " \ 197 "fi; " \ 198 "fi; " \ 199 "else run netboot; fi" 200 201 #define CONFIG_SYS_MEMTEST_START 0x10000000 202 #define CONFIG_SYS_MEMTEST_END 0x10010000 203 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 204 205 /* Physical Memory Map */ 206 #define CONFIG_NR_DRAM_BANKS 1 207 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 208 209 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 210 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 211 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 212 213 #define CONFIG_SYS_INIT_SP_OFFSET \ 214 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 215 #define CONFIG_SYS_INIT_SP_ADDR \ 216 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 217 218 /* Environment organization */ 219 #if defined (CONFIG_ENV_IS_IN_MMC) 220 #define CONFIG_ENV_OFFSET (6 * 64 * 1024) 221 #define CONFIG_SYS_MMC_ENV_DEV 0 222 #endif 223 224 #define CONFIG_ENV_SIZE (8 * 1024) 225 226 #if defined(CONFIG_ENV_IS_IN_SPI_FLASH) 227 #define CONFIG_ENV_OFFSET (768 * 1024) 228 #define CONFIG_ENV_SECT_SIZE (64 * 1024) 229 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS 230 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS 231 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE 232 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 233 #endif 234 235 #endif /* __CONFIG_CGTQMX6EVAL_H */ 236