1 /*
2  *
3  * Congatec Conga-QEVAl board configuration file.
4  *
5  * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
6  * Based on Freescale i.MX6Q Sabre Lite board configuration file.
7  * Copyright (C) 2013, Adeneo Embedded <www.adeneo-embedded.com>
8  * Leo Sartre, <lsartre@adeneo-embedded.com>
9  *
10  * SPDX-License-Identifier:	GPL-2.0+
11  */
12 
13 #ifndef __CONFIG_CGTQMX6EVAL_H
14 #define __CONFIG_CGTQMX6EVAL_H
15 
16 #include "mx6_common.h"
17 
18 #define CONFIG_MACH_TYPE	4122
19 
20 #ifdef CONFIG_SPL
21 #define CONFIG_SYS_SPI_U_BOOT_OFFS	(64 * 1024)
22 #define CONFIG_SPL_SPI_LOAD
23 #include "imx6_spl.h"
24 #endif
25 
26 /* Size of malloc() pool */
27 #define CONFIG_SYS_MALLOC_LEN		(10 * 1024 * 1024)
28 
29 #define CONFIG_BOARD_EARLY_INIT_F
30 #define CONFIG_MISC_INIT_R
31 
32 #define CONFIG_MXC_UART
33 #define CONFIG_MXC_UART_BASE	       UART2_BASE
34 
35 /* MMC Configs */
36 #define CONFIG_SYS_FSL_ESDHC_ADDR      0
37 
38 /* SPI NOR */
39 #define CONFIG_SPI_FLASH
40 #define CONFIG_SPI_FLASH_STMICRO
41 #define CONFIG_SPI_FLASH_SST
42 #define CONFIG_MXC_SPI
43 #define CONFIG_SF_DEFAULT_BUS		0
44 #define CONFIG_SF_DEFAULT_SPEED		20000000
45 #define CONFIG_SF_DEFAULT_MODE		(SPI_MODE_0)
46 
47 /* Miscellaneous commands */
48 #define CONFIG_CMD_BMODE
49 
50 /* Thermal support */
51 #define CONFIG_IMX_THERMAL
52 
53 /* I2C Configs */
54 #define CONFIG_SYS_I2C
55 #define CONFIG_SYS_I2C_MXC
56 #define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
57 #define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
58 #define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
59 #define CONFIG_SYS_I2C_SPEED		  100000
60 
61 /* PMIC */
62 #define CONFIG_POWER
63 #define CONFIG_POWER_I2C
64 #define CONFIG_POWER_PFUZE100
65 #define CONFIG_POWER_PFUZE100_I2C_ADDR	0x08
66 
67 /* USB Configs */
68 #define CONFIG_USB_EHCI
69 #define CONFIG_USB_EHCI_MX6
70 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
71 #define CONFIG_USB_HOST_ETHER
72 #define CONFIG_USB_ETHER_ASIX
73 #define CONFIG_MXC_USB_PORTSC	(PORT_PTS_UTMI | PORT_PTS_PTW)
74 #define CONFIG_MXC_USB_FLAGS	0
75 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 /* Enabled USB controller number */
76 #define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP
77 
78 #define CONFIG_USBD_HS
79 
80 #define CONFIG_USB_FUNCTION_MASS_STORAGE
81 
82 #define CONFIG_USB_FUNCTION_FASTBOOT
83 #define CONFIG_CMD_FASTBOOT
84 #define CONFIG_ANDROID_BOOT_IMAGE
85 #define CONFIG_FASTBOOT_BUF_ADDR   CONFIG_SYS_LOAD_ADDR
86 #define CONFIG_FASTBOOT_BUF_SIZE   0x07000000
87 
88 /* Framebuffer */
89 #define CONFIG_VIDEO_IPUV3
90 #define CONFIG_VIDEO_BMP_RLE8
91 #define CONFIG_SPLASH_SCREEN
92 #define CONFIG_SPLASH_SCREEN_ALIGN
93 #define CONFIG_BMP_16BPP
94 #define CONFIG_VIDEO_LOGO
95 #define CONFIG_VIDEO_BMP_LOGO
96 #ifdef CONFIG_MX6DL
97 #define CONFIG_IPUV3_CLK 198000000
98 #else
99 #define CONFIG_IPUV3_CLK 264000000
100 #endif
101 #define CONFIG_IMX_HDMI
102 
103 /* SATA */
104 #define CONFIG_CMD_SATA
105 #define CONFIG_DWC_AHSATA
106 #define CONFIG_SYS_SATA_MAX_DEVICE	1
107 #define CONFIG_DWC_AHSATA_PORT_ID	0
108 #define CONFIG_DWC_AHSATA_BASE_ADDR	SATA_ARB_BASE_ADDR
109 #define CONFIG_LBA48
110 #define CONFIG_LIBATA
111 
112 /* Ethernet */
113 #define CONFIG_FEC_MXC
114 #define CONFIG_MII
115 #define IMX_FEC_BASE			ENET_BASE_ADDR
116 #define CONFIG_FEC_XCV_TYPE		RGMII
117 #define CONFIG_ETHPRIME			"FEC"
118 #define CONFIG_FEC_MXC_PHYADDR		6
119 #define CONFIG_PHYLIB
120 #define CONFIG_PHY_ATHEROS
121 
122 /* Command definition */
123 
124 #define CONFIG_MXC_UART_BASE	UART2_BASE
125 #define CONSOLE_DEV	"ttymxc1"
126 #define CONFIG_MMCROOT		"/dev/mmcblk0p2"
127 #define CONFIG_SYS_MMC_ENV_DEV		0
128 
129 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
130 #define CONFIG_EXTRA_ENV_SETTINGS \
131 	"script=boot.scr\0" \
132 	"image=zImage\0" \
133 	"fdtfile=undefined\0" \
134 	"fdt_addr_r=0x18000000\0" \
135 	"boot_fdt=try\0" \
136 	"ip_dyn=yes\0" \
137 	"console=" CONSOLE_DEV "\0" \
138 	"dfuspi=dfu 0 sf 0:0:10000000:0\0" \
139 	"dfu_alt_info_spl=spl raw 0x400\0" \
140 	"dfu_alt_info_img=u-boot raw 0x10000\0" \
141 	"dfu_alt_info=spl raw 0x400\0" \
142 	"bootm_size=0x10000000\0" \
143 	"mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
144 	"mmcpart=1\0" \
145 	"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
146 	"update_sd_firmware=" \
147 		"if test ${ip_dyn} = yes; then " \
148 			"setenv get_cmd dhcp; " \
149 		"else " \
150 			"setenv get_cmd tftp; " \
151 		"fi; " \
152 		"if mmc dev ${mmcdev}; then "	\
153 			"if ${get_cmd} ${update_sd_firmware_filename}; then " \
154 				"setexpr fw_sz ${filesize} / 0x200; " \
155 				"setexpr fw_sz ${fw_sz} + 1; "	\
156 				"mmc write ${loadaddr} 0x2 ${fw_sz}; " \
157 			"fi; "	\
158 		"fi\0" \
159 	"mmcargs=setenv bootargs console=${console},${baudrate} " \
160 		"root=${mmcroot}\0" \
161 	"loadbootscript=" \
162 		"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
163 	"bootscript=echo Running bootscript from mmc ...; " \
164 		"source\0" \
165 	"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
166 	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr_r} ${fdtfile}\0" \
167 	"mmcboot=echo Booting from mmc ...; " \
168 		"run mmcargs; " \
169 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
170 			"if run loadfdt; then " \
171 				"bootz ${loadaddr} - ${fdt_addr_r}; " \
172 			"else " \
173 				"if test ${boot_fdt} = try; then " \
174 					"bootz; " \
175 				"else " \
176 					"echo WARN: Cannot load the DT; " \
177 				"fi; " \
178 			"fi; " \
179 		"else " \
180 			"bootz; " \
181 		"fi;\0" \
182 	"findfdt="\
183 		"if test $board_rev = MX6Q ; then " \
184 			"setenv fdtfile imx6q-qmx6.dtb; fi; " \
185 		"if test $board_rev = MX6DL ; then " \
186 			"setenv fdtfile imx6dl-qmx6.dtb; fi; " \
187 		"if test $fdtfile = undefined; then " \
188 			"echo WARNING: Could not determine dtb to use; fi; \0" \
189 	"netargs=setenv bootargs console=${console},${baudrate} " \
190 		"root=/dev/nfs " \
191 		"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
192 	"netboot=echo Booting from net ...; " \
193 		"run netargs; " \
194 		"if test ${ip_dyn} = yes; then " \
195 			"setenv get_cmd dhcp; " \
196 		"else " \
197 			"setenv get_cmd tftp; " \
198 		"fi; " \
199 		"${get_cmd} ${image}; " \
200 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
201 			"if ${get_cmd} ${fdt_addr_r} ${fdtfile}; then " \
202 				"bootz ${loadaddr} - ${fdt_addr_r}; " \
203 			"else " \
204 				"if test ${boot_fdt} = try; then " \
205 					"bootz; " \
206 				"else " \
207 					"echo WARN: Cannot load the DT; " \
208 				"fi; " \
209 			"fi; " \
210 		"else " \
211 			"bootz; " \
212 		"fi;\0" \
213 	"spilock=sf probe && sf protect lock 0x3f0000 0x10000;"\
214 
215 #define CONFIG_BOOTCOMMAND \
216 	"run spilock;"	    \
217 	"run findfdt; "	\
218 	"mmc dev ${mmcdev};" \
219 	"if mmc rescan; then " \
220 		"if run loadbootscript; then " \
221 		"run bootscript; " \
222 		"else " \
223 			"if run loadimage; then " \
224 				"run mmcboot; " \
225 			"else run netboot; " \
226 			"fi; " \
227 		"fi; " \
228 	"else run netboot; fi"
229 
230 #define CONFIG_SYS_MEMTEST_START       0x10000000
231 #define CONFIG_SYS_MEMTEST_END	       0x10010000
232 #define CONFIG_SYS_MEMTEST_SCRATCH     0x10800000
233 
234 /* Physical Memory Map */
235 #define CONFIG_NR_DRAM_BANKS	       1
236 #define PHYS_SDRAM		       MMDC0_ARB_BASE_ADDR
237 
238 #define CONFIG_SYS_SDRAM_BASE	       PHYS_SDRAM
239 #define CONFIG_SYS_INIT_RAM_ADDR       IRAM_BASE_ADDR
240 #define CONFIG_SYS_INIT_RAM_SIZE       IRAM_SIZE
241 
242 #define CONFIG_SYS_INIT_SP_OFFSET \
243 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
244 #define CONFIG_SYS_INIT_SP_ADDR \
245 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
246 
247 /* Environment organization */
248 #if defined (CONFIG_ENV_IS_IN_MMC)
249 #define CONFIG_ENV_OFFSET		(6 * 64 * 1024)
250 #define CONFIG_SYS_MMC_ENV_DEV		0
251 #endif
252 
253 #define CONFIG_ENV_SIZE			(8 * 1024)
254 
255 #define CONFIG_ENV_IS_IN_SPI_FLASH
256 #if defined(CONFIG_ENV_IS_IN_SPI_FLASH)
257 #define CONFIG_ENV_OFFSET		(768 * 1024)
258 #define CONFIG_ENV_SECT_SIZE		(64 * 1024)
259 #define CONFIG_ENV_SPI_BUS		CONFIG_SF_DEFAULT_BUS
260 #define CONFIG_ENV_SPI_CS		CONFIG_SF_DEFAULT_CS
261 #define CONFIG_ENV_SPI_MODE		CONFIG_SF_DEFAULT_MODE
262 #define CONFIG_ENV_SPI_MAX_HZ		CONFIG_SF_DEFAULT_SPEED
263 #endif
264 
265 #endif			       /* __CONFIG_CGTQMX6EVAL_H */
266