1 /* 2 * 3 * Congatec Conga-QEVAl board configuration file. 4 * 5 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. 6 * Based on Freescale i.MX6Q Sabre Lite board configuration file. 7 * Copyright (C) 2013, Adeneo Embedded <www.adeneo-embedded.com> 8 * Leo Sartre, <lsartre@adeneo-embedded.com> 9 * 10 * SPDX-License-Identifier: GPL-2.0+ 11 */ 12 13 #ifndef __CONFIG_CGTQMX6EVAL_H 14 #define __CONFIG_CGTQMX6EVAL_H 15 16 #include "mx6_common.h" 17 18 #define CONFIG_MACH_TYPE 4122 19 20 #ifdef CONFIG_SPL 21 #define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024) 22 #define CONFIG_SPL_SPI_LOAD 23 #include "imx6_spl.h" 24 #endif 25 26 /* Size of malloc() pool */ 27 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) 28 29 #define CONFIG_BOARD_EARLY_INIT_F 30 #define CONFIG_BOARD_LATE_INIT 31 #define CONFIG_MISC_INIT_R 32 33 #define CONFIG_MXC_UART 34 #define CONFIG_MXC_UART_BASE UART2_BASE 35 36 /* MMC Configs */ 37 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 38 39 /* SPI NOR */ 40 #define CONFIG_SPI_FLASH 41 #define CONFIG_SPI_FLASH_STMICRO 42 #define CONFIG_SPI_FLASH_SST 43 #define CONFIG_MXC_SPI 44 #define CONFIG_SF_DEFAULT_BUS 0 45 #define CONFIG_SF_DEFAULT_SPEED 20000000 46 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) 47 48 /* Miscellaneous commands */ 49 #define CONFIG_CMD_BMODE 50 51 /* Thermal support */ 52 #define CONFIG_IMX_THERMAL 53 54 /* I2C Configs */ 55 #define CONFIG_SYS_I2C 56 #define CONFIG_SYS_I2C_MXC 57 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 58 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 59 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 60 #define CONFIG_SYS_I2C_SPEED 100000 61 62 /* PMIC */ 63 #define CONFIG_POWER 64 #define CONFIG_POWER_I2C 65 #define CONFIG_POWER_PFUZE100 66 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 67 68 /* USB Configs */ 69 #define CONFIG_USB_EHCI 70 #define CONFIG_USB_EHCI_MX6 71 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 72 #define CONFIG_USB_HOST_ETHER 73 #define CONFIG_USB_ETHER_ASIX 74 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 75 #define CONFIG_MXC_USB_FLAGS 0 76 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 /* Enabled USB controller number */ 77 #define CONFIG_USB_KEYBOARD 78 #define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP 79 80 #define CONFIG_USBD_HS 81 82 #define CONFIG_USB_FUNCTION_MASS_STORAGE 83 84 /* USB Device Firmware Update support */ 85 #define CONFIG_USB_FUNCTION_DFU 86 #define CONFIG_DFU_MMC 87 #define CONFIG_DFU_SF 88 89 #define CONFIG_USB_FUNCTION_FASTBOOT 90 #define CONFIG_CMD_FASTBOOT 91 #define CONFIG_ANDROID_BOOT_IMAGE 92 #define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR 93 #define CONFIG_FASTBOOT_BUF_SIZE 0x07000000 94 95 /* Framebuffer */ 96 #define CONFIG_VIDEO 97 #define CONFIG_VIDEO_IPUV3 98 #define CONFIG_CFB_CONSOLE 99 #define CONFIG_VGA_AS_SINGLE_DEVICE 100 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 101 #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE 102 #define CONFIG_VIDEO_BMP_RLE8 103 #define CONFIG_SPLASH_SCREEN 104 #define CONFIG_SPLASH_SCREEN_ALIGN 105 #define CONFIG_BMP_16BPP 106 #define CONFIG_VIDEO_LOGO 107 #define CONFIG_VIDEO_BMP_LOGO 108 #ifdef CONFIG_MX6DL 109 #define CONFIG_IPUV3_CLK 198000000 110 #else 111 #define CONFIG_IPUV3_CLK 264000000 112 #endif 113 #define CONFIG_IMX_HDMI 114 115 /* SATA */ 116 #define CONFIG_CMD_SATA 117 #define CONFIG_DWC_AHSATA 118 #define CONFIG_SYS_SATA_MAX_DEVICE 1 119 #define CONFIG_DWC_AHSATA_PORT_ID 0 120 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR 121 #define CONFIG_LBA48 122 #define CONFIG_LIBATA 123 124 /* Ethernet */ 125 #define CONFIG_FEC_MXC 126 #define CONFIG_MII 127 #define IMX_FEC_BASE ENET_BASE_ADDR 128 #define CONFIG_FEC_XCV_TYPE RGMII 129 #define CONFIG_ETHPRIME "FEC" 130 #define CONFIG_FEC_MXC_PHYADDR 6 131 #define CONFIG_PHYLIB 132 #define CONFIG_PHY_ATHEROS 133 134 /* Command definition */ 135 136 #define CONFIG_MXC_UART_BASE UART2_BASE 137 #define CONFIG_CONSOLE_DEV "ttymxc1" 138 #define CONFIG_MMCROOT "/dev/mmcblk0p2" 139 #define CONFIG_SYS_MMC_ENV_DEV 0 140 141 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG 142 #define CONFIG_EXTRA_ENV_SETTINGS \ 143 "script=boot.scr\0" \ 144 "image=zImage\0" \ 145 "fdtfile=undefined\0" \ 146 "fdt_addr_r=0x18000000\0" \ 147 "boot_fdt=try\0" \ 148 "ip_dyn=yes\0" \ 149 "console=" CONFIG_CONSOLE_DEV "\0" \ 150 "dfuspi=dfu 0 sf 0:0:10000000:0\0" \ 151 "dfu_alt_info_spl=spl raw 0x400\0" \ 152 "dfu_alt_info_img=u-boot raw 0x10000\0" \ 153 "dfu_alt_info=spl raw 0x400\0" \ 154 "bootm_size=0x10000000\0" \ 155 "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ 156 "mmcpart=1\0" \ 157 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ 158 "update_sd_firmware=" \ 159 "if test ${ip_dyn} = yes; then " \ 160 "setenv get_cmd dhcp; " \ 161 "else " \ 162 "setenv get_cmd tftp; " \ 163 "fi; " \ 164 "if mmc dev ${mmcdev}; then " \ 165 "if ${get_cmd} ${update_sd_firmware_filename}; then " \ 166 "setexpr fw_sz ${filesize} / 0x200; " \ 167 "setexpr fw_sz ${fw_sz} + 1; " \ 168 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \ 169 "fi; " \ 170 "fi\0" \ 171 "mmcargs=setenv bootargs console=${console},${baudrate} " \ 172 "root=${mmcroot}\0" \ 173 "loadbootscript=" \ 174 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 175 "bootscript=echo Running bootscript from mmc ...; " \ 176 "source\0" \ 177 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ 178 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr_r} ${fdtfile}\0" \ 179 "mmcboot=echo Booting from mmc ...; " \ 180 "run mmcargs; " \ 181 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 182 "if run loadfdt; then " \ 183 "bootz ${loadaddr} - ${fdt_addr_r}; " \ 184 "else " \ 185 "if test ${boot_fdt} = try; then " \ 186 "bootz; " \ 187 "else " \ 188 "echo WARN: Cannot load the DT; " \ 189 "fi; " \ 190 "fi; " \ 191 "else " \ 192 "bootz; " \ 193 "fi;\0" \ 194 "findfdt="\ 195 "if test $board_rev = MX6Q ; then " \ 196 "setenv fdtfile imx6q-qmx6.dtb; fi; " \ 197 "if test $board_rev = MX6DL ; then " \ 198 "setenv fdtfile imx6dl-qmx6.dtb; fi; " \ 199 "if test $fdtfile = undefined; then " \ 200 "echo WARNING: Could not determine dtb to use; fi; \0" \ 201 "netargs=setenv bootargs console=${console},${baudrate} " \ 202 "root=/dev/nfs " \ 203 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 204 "netboot=echo Booting from net ...; " \ 205 "run netargs; " \ 206 "if test ${ip_dyn} = yes; then " \ 207 "setenv get_cmd dhcp; " \ 208 "else " \ 209 "setenv get_cmd tftp; " \ 210 "fi; " \ 211 "${get_cmd} ${image}; " \ 212 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 213 "if ${get_cmd} ${fdt_addr_r} ${fdtfile}; then " \ 214 "bootz ${loadaddr} - ${fdt_addr_r}; " \ 215 "else " \ 216 "if test ${boot_fdt} = try; then " \ 217 "bootz; " \ 218 "else " \ 219 "echo WARN: Cannot load the DT; " \ 220 "fi; " \ 221 "fi; " \ 222 "else " \ 223 "bootz; " \ 224 "fi;\0" \ 225 "spilock=sf probe && sf protect lock 0x3f0000 0x10000;"\ 226 227 #define CONFIG_BOOTCOMMAND \ 228 "run spilock;" \ 229 "run findfdt; " \ 230 "mmc dev ${mmcdev};" \ 231 "if mmc rescan; then " \ 232 "if run loadbootscript; then " \ 233 "run bootscript; " \ 234 "else " \ 235 "if run loadimage; then " \ 236 "run mmcboot; " \ 237 "else run netboot; " \ 238 "fi; " \ 239 "fi; " \ 240 "else run netboot; fi" 241 242 #define CONFIG_SYS_MEMTEST_START 0x10000000 243 #define CONFIG_SYS_MEMTEST_END 0x10010000 244 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 245 246 /* Physical Memory Map */ 247 #define CONFIG_NR_DRAM_BANKS 1 248 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 249 250 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 251 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 252 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 253 254 #define CONFIG_SYS_INIT_SP_OFFSET \ 255 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 256 #define CONFIG_SYS_INIT_SP_ADDR \ 257 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 258 259 /* Environment organization */ 260 #if defined (CONFIG_ENV_IS_IN_MMC) 261 #define CONFIG_ENV_OFFSET (6 * 64 * 1024) 262 #define CONFIG_SYS_MMC_ENV_DEV 0 263 #endif 264 265 #define CONFIG_ENV_SIZE (8 * 1024) 266 267 #define CONFIG_ENV_IS_IN_SPI_FLASH 268 #if defined(CONFIG_ENV_IS_IN_SPI_FLASH) 269 #define CONFIG_ENV_OFFSET (768 * 1024) 270 #define CONFIG_ENV_SECT_SIZE (64 * 1024) 271 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS 272 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS 273 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE 274 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 275 #endif 276 277 #endif /* __CONFIG_CGTQMX6EVAL_H */ 278