1 /* 2 * 3 * Congatec Conga-QEVAl board configuration file. 4 * 5 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. 6 * Based on Freescale i.MX6Q Sabre Lite board configuration file. 7 * Copyright (C) 2013, Adeneo Embedded <www.adeneo-embedded.com> 8 * Leo Sartre, <lsartre@adeneo-embedded.com> 9 * 10 * SPDX-License-Identifier: GPL-2.0+ 11 */ 12 13 #ifndef __CONFIG_CGTQMX6EVAL_H 14 #define __CONFIG_CGTQMX6EVAL_H 15 16 #include "mx6_common.h" 17 18 #define CONFIG_MACH_TYPE 4122 19 20 /* Size of malloc() pool */ 21 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) 22 23 #define CONFIG_BOARD_EARLY_INIT_F 24 #define CONFIG_MISC_INIT_R 25 26 #define CONFIG_MXC_UART 27 #define CONFIG_MXC_UART_BASE UART2_BASE 28 29 /* MMC Configs */ 30 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 31 32 /* Miscellaneous commands */ 33 #define CONFIG_CMD_BMODE 34 35 /* Thermal support */ 36 #define CONFIG_IMX_THERMAL 37 38 /* I2C Configs */ 39 #define CONFIG_CMD_I2C 40 #define CONFIG_SYS_I2C 41 #define CONFIG_SYS_I2C_MXC 42 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 43 #define CONFIG_SYS_I2C_SPEED 100000 44 45 /* PMIC */ 46 #define CONFIG_POWER 47 #define CONFIG_POWER_I2C 48 #define CONFIG_POWER_PFUZE100 49 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 50 51 /* USB Configs */ 52 #define CONFIG_CMD_USB 53 #define CONFIG_CMD_FAT 54 #define CONFIG_USB_EHCI 55 #define CONFIG_USB_EHCI_MX6 56 #define CONFIG_USB_STORAGE 57 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 58 #define CONFIG_USB_HOST_ETHER 59 #define CONFIG_USB_ETHER_ASIX 60 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 61 #define CONFIG_MXC_USB_FLAGS 0 62 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 /* Enabled USB controller number */ 63 #define CONFIG_USB_KEYBOARD 64 #define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP 65 66 /* Framebuffer */ 67 #define CONFIG_VIDEO 68 #define CONFIG_VIDEO_IPUV3 69 #define CONFIG_CFB_CONSOLE 70 #define CONFIG_VGA_AS_SINGLE_DEVICE 71 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 72 #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE 73 #define CONFIG_VIDEO_BMP_RLE8 74 #define CONFIG_SPLASH_SCREEN 75 #define CONFIG_SPLASH_SCREEN_ALIGN 76 #define CONFIG_BMP_16BPP 77 #define CONFIG_VIDEO_LOGO 78 #define CONFIG_VIDEO_BMP_LOGO 79 #ifdef CONFIG_MX6DL 80 #define CONFIG_IPUV3_CLK 198000000 81 #else 82 #define CONFIG_IPUV3_CLK 264000000 83 #endif 84 #define CONFIG_IMX_HDMI 85 86 /* SATA */ 87 #define CONFIG_CMD_SATA 88 #define CONFIG_DWC_AHSATA 89 #define CONFIG_SYS_SATA_MAX_DEVICE 1 90 #define CONFIG_DWC_AHSATA_PORT_ID 0 91 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR 92 #define CONFIG_LBA48 93 #define CONFIG_LIBATA 94 95 /* Ethernet */ 96 #define CONFIG_CMD_PING 97 #define CONFIG_CMD_DHCP 98 #define CONFIG_CMD_MII 99 #define CONFIG_FEC_MXC 100 #define CONFIG_MII 101 #define IMX_FEC_BASE ENET_BASE_ADDR 102 #define CONFIG_FEC_XCV_TYPE RGMII 103 #define CONFIG_ETHPRIME "FEC" 104 #define CONFIG_FEC_MXC_PHYADDR 6 105 #define CONFIG_PHYLIB 106 #define CONFIG_PHY_ATHEROS 107 108 /* Command definition */ 109 110 #define CONFIG_MXC_UART_BASE UART2_BASE 111 #define CONFIG_CONSOLE_DEV "ttymxc1" 112 #define CONFIG_MMCROOT "/dev/mmcblk0p2" 113 #define CONFIG_SYS_MMC_ENV_DEV 0 114 115 #define CONFIG_EXTRA_ENV_SETTINGS \ 116 "script=boot.scr\0" \ 117 "image=zImage\0" \ 118 "fdtfile=imx6q-qmx6.dtb\0" \ 119 "fdt_addr_r=0x18000000\0" \ 120 "boot_fdt=try\0" \ 121 "ip_dyn=yes\0" \ 122 "console=" CONFIG_CONSOLE_DEV "\0" \ 123 "bootm_size=0x10000000\0" \ 124 "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ 125 "mmcpart=1\0" \ 126 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ 127 "update_sd_firmware=" \ 128 "if test ${ip_dyn} = yes; then " \ 129 "setenv get_cmd dhcp; " \ 130 "else " \ 131 "setenv get_cmd tftp; " \ 132 "fi; " \ 133 "if mmc dev ${mmcdev}; then " \ 134 "if ${get_cmd} ${update_sd_firmware_filename}; then " \ 135 "setexpr fw_sz ${filesize} / 0x200; " \ 136 "setexpr fw_sz ${fw_sz} + 1; " \ 137 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \ 138 "fi; " \ 139 "fi\0" \ 140 "mmcargs=setenv bootargs console=${console},${baudrate} " \ 141 "root=${mmcroot}\0" \ 142 "loadbootscript=" \ 143 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 144 "bootscript=echo Running bootscript from mmc ...; " \ 145 "source\0" \ 146 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ 147 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr_r} ${fdtfile}\0" \ 148 "mmcboot=echo Booting from mmc ...; " \ 149 "run mmcargs; " \ 150 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 151 "if run loadfdt; then " \ 152 "bootz ${loadaddr} - ${fdt_addr_r}; " \ 153 "else " \ 154 "if test ${boot_fdt} = try; then " \ 155 "bootz; " \ 156 "else " \ 157 "echo WARN: Cannot load the DT; " \ 158 "fi; " \ 159 "fi; " \ 160 "else " \ 161 "bootz; " \ 162 "fi;\0" \ 163 "netargs=setenv bootargs console=${console},${baudrate} " \ 164 "root=/dev/nfs " \ 165 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 166 "netboot=echo Booting from net ...; " \ 167 "run netargs; " \ 168 "if test ${ip_dyn} = yes; then " \ 169 "setenv get_cmd dhcp; " \ 170 "else " \ 171 "setenv get_cmd tftp; " \ 172 "fi; " \ 173 "${get_cmd} ${image}; " \ 174 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 175 "if ${get_cmd} ${fdt_addr_r} ${fdtfile}; then " \ 176 "bootz ${loadaddr} - ${fdt_addr_r}; " \ 177 "else " \ 178 "if test ${boot_fdt} = try; then " \ 179 "bootz; " \ 180 "else " \ 181 "echo WARN: Cannot load the DT; " \ 182 "fi; " \ 183 "fi; " \ 184 "else " \ 185 "bootz; " \ 186 "fi;\0" \ 187 188 #define CONFIG_BOOTCOMMAND \ 189 "mmc dev ${mmcdev};" \ 190 "if mmc rescan; then " \ 191 "if run loadbootscript; then " \ 192 "run bootscript; " \ 193 "else " \ 194 "if run loadimage; then " \ 195 "run mmcboot; " \ 196 "else run netboot; " \ 197 "fi; " \ 198 "fi; " \ 199 "else run netboot; fi" 200 201 #define CONFIG_SYS_MEMTEST_START 0x10000000 202 #define CONFIG_SYS_MEMTEST_END 0x10010000 203 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 204 205 /* Physical Memory Map */ 206 #define CONFIG_NR_DRAM_BANKS 1 207 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 208 #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024) 209 210 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 211 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 212 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 213 214 #define CONFIG_SYS_INIT_SP_OFFSET \ 215 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 216 #define CONFIG_SYS_INIT_SP_ADDR \ 217 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 218 219 /* Environment organization */ 220 #define CONFIG_ENV_SIZE (8 * 1024) 221 222 #define CONFIG_ENV_IS_IN_MMC 223 224 #define CONFIG_ENV_OFFSET (6 * 64 * 1024) 225 #define CONFIG_SYS_MMC_ENV_DEV 0 226 227 #endif /* __CONFIG_CGTQMX6EVAL_H */ 228