1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  *
4  * Congatec Conga-QEVAl board configuration file.
5  *
6  * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
7  * Based on Freescale i.MX6Q Sabre Lite board configuration file.
8  * Copyright (C) 2013, Adeneo Embedded <www.adeneo-embedded.com>
9  * Leo Sartre, <lsartre@adeneo-embedded.com>
10  */
11 
12 #ifndef __CONFIG_CGTQMX6EVAL_H
13 #define __CONFIG_CGTQMX6EVAL_H
14 
15 #include "mx6_common.h"
16 
17 #define CONFIG_MACH_TYPE	4122
18 
19 #ifdef CONFIG_SPL
20 #define CONFIG_SYS_SPI_U_BOOT_OFFS	(64 * 1024)
21 #include "imx6_spl.h"
22 #endif
23 
24 /* Size of malloc() pool */
25 #define CONFIG_SYS_MALLOC_LEN		(10 * 1024 * 1024)
26 
27 #define CONFIG_MXC_UART
28 #define CONFIG_MXC_UART_BASE	       UART2_BASE
29 
30 /* MMC Configs */
31 #define CONFIG_SYS_FSL_ESDHC_ADDR      0
32 
33 /* SPI NOR */
34 #define CONFIG_SPI_FLASH_STMICRO
35 #define CONFIG_SPI_FLASH_SST
36 #define CONFIG_SF_DEFAULT_BUS		0
37 #define CONFIG_SF_DEFAULT_SPEED		20000000
38 #define CONFIG_SF_DEFAULT_MODE		(SPI_MODE_0)
39 
40 /* Thermal support */
41 #define CONFIG_IMX_THERMAL
42 
43 /* I2C Configs */
44 #define CONFIG_SYS_I2C
45 #define CONFIG_SYS_I2C_MXC
46 #define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
47 #define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
48 #define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
49 #define CONFIG_SYS_I2C_SPEED		  100000
50 
51 /* PMIC */
52 #define CONFIG_POWER
53 #define CONFIG_POWER_I2C
54 #define CONFIG_POWER_PFUZE100
55 #define CONFIG_POWER_PFUZE100_I2C_ADDR	0x08
56 
57 /* USB Configs */
58 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
59 #define CONFIG_MXC_USB_PORTSC	(PORT_PTS_UTMI | PORT_PTS_PTW)
60 #define CONFIG_MXC_USB_FLAGS	0
61 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 /* Enabled USB controller number */
62 
63 #define CONFIG_USBD_HS
64 
65 /* Framebuffer */
66 #define CONFIG_VIDEO_IPUV3
67 #define CONFIG_VIDEO_BMP_RLE8
68 #define CONFIG_SPLASH_SCREEN
69 #define CONFIG_SPLASH_SCREEN_ALIGN
70 #define CONFIG_BMP_16BPP
71 #define CONFIG_VIDEO_LOGO
72 #define CONFIG_VIDEO_BMP_LOGO
73 #define CONFIG_IMX_HDMI
74 
75 /* SATA */
76 #define CONFIG_SYS_SATA_MAX_DEVICE	1
77 #define CONFIG_DWC_AHSATA_PORT_ID	0
78 #define CONFIG_DWC_AHSATA_BASE_ADDR	SATA_ARB_BASE_ADDR
79 #define CONFIG_LBA48
80 
81 /* Ethernet */
82 #define CONFIG_FEC_MXC
83 #define IMX_FEC_BASE			ENET_BASE_ADDR
84 #define CONFIG_FEC_XCV_TYPE		RGMII
85 #define CONFIG_ETHPRIME			"FEC"
86 #define CONFIG_FEC_MXC_PHYADDR		6
87 #define CONFIG_PHY_ATHEROS
88 
89 /* Command definition */
90 
91 #define CONFIG_MXC_UART_BASE	UART2_BASE
92 #define CONSOLE_DEV	"ttymxc1"
93 #define CONFIG_MMCROOT		"/dev/mmcblk0p2"
94 #define CONFIG_SYS_MMC_ENV_DEV		0
95 
96 #define CONFIG_EXTRA_ENV_SETTINGS \
97 	"script=boot.scr\0" \
98 	"image=zImage\0" \
99 	"fdtfile=undefined\0" \
100 	"fdt_addr_r=0x18000000\0" \
101 	"boot_fdt=try\0" \
102 	"ip_dyn=yes\0" \
103 	"console=" CONSOLE_DEV "\0" \
104 	"dfuspi=dfu 0 sf 0:0:10000000:0\0" \
105 	"dfu_alt_info_spl=spl raw 0x400\0" \
106 	"dfu_alt_info_img=u-boot raw 0x10000\0" \
107 	"dfu_alt_info=spl raw 0x400\0" \
108 	"bootm_size=0x10000000\0" \
109 	"mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
110 	"mmcpart=1\0" \
111 	"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
112 	"update_sd_firmware=" \
113 		"if test ${ip_dyn} = yes; then " \
114 			"setenv get_cmd dhcp; " \
115 		"else " \
116 			"setenv get_cmd tftp; " \
117 		"fi; " \
118 		"if mmc dev ${mmcdev}; then "	\
119 			"if ${get_cmd} ${update_sd_firmware_filename}; then " \
120 				"setexpr fw_sz ${filesize} / 0x200; " \
121 				"setexpr fw_sz ${fw_sz} + 1; "	\
122 				"mmc write ${loadaddr} 0x2 ${fw_sz}; " \
123 			"fi; "	\
124 		"fi\0" \
125 	"mmcargs=setenv bootargs console=${console},${baudrate} " \
126 		"root=${mmcroot}\0" \
127 	"loadbootscript=" \
128 		"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
129 	"bootscript=echo Running bootscript from mmc ...; " \
130 		"source\0" \
131 	"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
132 	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr_r} ${fdtfile}\0" \
133 	"mmcboot=echo Booting from mmc ...; " \
134 		"run mmcargs; " \
135 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
136 			"if run loadfdt; then " \
137 				"bootz ${loadaddr} - ${fdt_addr_r}; " \
138 			"else " \
139 				"if test ${boot_fdt} = try; then " \
140 					"bootz; " \
141 				"else " \
142 					"echo WARN: Cannot load the DT; " \
143 				"fi; " \
144 			"fi; " \
145 		"else " \
146 			"bootz; " \
147 		"fi;\0" \
148 	"findfdt="\
149 		"if test $board_rev = MX6Q ; then " \
150 			"setenv fdtfile imx6q-qmx6.dtb; fi; " \
151 		"if test $board_rev = MX6DL ; then " \
152 			"setenv fdtfile imx6dl-qmx6.dtb; fi; " \
153 		"if test $fdtfile = undefined; then " \
154 			"echo WARNING: Could not determine dtb to use; fi; \0" \
155 	"netargs=setenv bootargs console=${console},${baudrate} " \
156 		"root=/dev/nfs " \
157 		"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
158 	"netboot=echo Booting from net ...; " \
159 		"run netargs; " \
160 		"if test ${ip_dyn} = yes; then " \
161 			"setenv get_cmd dhcp; " \
162 		"else " \
163 			"setenv get_cmd tftp; " \
164 		"fi; " \
165 		"${get_cmd} ${image}; " \
166 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
167 			"if ${get_cmd} ${fdt_addr_r} ${fdtfile}; then " \
168 				"bootz ${loadaddr} - ${fdt_addr_r}; " \
169 			"else " \
170 				"if test ${boot_fdt} = try; then " \
171 					"bootz; " \
172 				"else " \
173 					"echo WARN: Cannot load the DT; " \
174 				"fi; " \
175 			"fi; " \
176 		"else " \
177 			"bootz; " \
178 		"fi;\0" \
179 	"spilock=sf probe && sf protect lock 0x3f0000 0x10000;"\
180 
181 #define CONFIG_BOOTCOMMAND \
182 	"run spilock;"	    \
183 	"run findfdt; "	\
184 	"mmc dev ${mmcdev};" \
185 	"if mmc rescan; then " \
186 		"if run loadbootscript; then " \
187 		"run bootscript; " \
188 		"else " \
189 			"if run loadimage; then " \
190 				"run mmcboot; " \
191 			"else run netboot; " \
192 			"fi; " \
193 		"fi; " \
194 	"else run netboot; fi"
195 
196 #define CONFIG_SYS_MEMTEST_START       0x10000000
197 #define CONFIG_SYS_MEMTEST_END	       0x10010000
198 #define CONFIG_SYS_MEMTEST_SCRATCH     0x10800000
199 
200 /* Physical Memory Map */
201 #define PHYS_SDRAM		       MMDC0_ARB_BASE_ADDR
202 
203 #define CONFIG_SYS_SDRAM_BASE	       PHYS_SDRAM
204 #define CONFIG_SYS_INIT_RAM_ADDR       IRAM_BASE_ADDR
205 #define CONFIG_SYS_INIT_RAM_SIZE       IRAM_SIZE
206 
207 #define CONFIG_SYS_INIT_SP_OFFSET \
208 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
209 #define CONFIG_SYS_INIT_SP_ADDR \
210 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
211 
212 /* Environment organization */
213 #if defined (CONFIG_ENV_IS_IN_MMC)
214 #define CONFIG_ENV_OFFSET		(6 * 64 * 1024)
215 #define CONFIG_SYS_MMC_ENV_DEV		0
216 #endif
217 
218 #define CONFIG_ENV_SIZE			(8 * 1024)
219 
220 #if defined(CONFIG_ENV_IS_IN_SPI_FLASH)
221 #define CONFIG_ENV_OFFSET		(768 * 1024)
222 #define CONFIG_ENV_SECT_SIZE		(64 * 1024)
223 #define CONFIG_ENV_SPI_BUS		CONFIG_SF_DEFAULT_BUS
224 #define CONFIG_ENV_SPI_CS		CONFIG_SF_DEFAULT_CS
225 #define CONFIG_ENV_SPI_MODE		CONFIG_SF_DEFAULT_MODE
226 #define CONFIG_ENV_SPI_MAX_HZ		CONFIG_SF_DEFAULT_SPEED
227 #endif
228 
229 #endif			       /* __CONFIG_CGTQMX6EVAL_H */
230