19b75bad0SSARTRE Leo /* 29b75bad0SSARTRE Leo * 39b75bad0SSARTRE Leo * Congatec Conga-QEVAl board configuration file. 49b75bad0SSARTRE Leo * 59b75bad0SSARTRE Leo * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. 69b75bad0SSARTRE Leo * Based on Freescale i.MX6Q Sabre Lite board configuration file. 79b75bad0SSARTRE Leo * Copyright (C) 2013, Adeneo Embedded <www.adeneo-embedded.com> 89b75bad0SSARTRE Leo * Leo Sartre, <lsartre@adeneo-embedded.com> 99b75bad0SSARTRE Leo * 101a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 119b75bad0SSARTRE Leo */ 129b75bad0SSARTRE Leo 139b75bad0SSARTRE Leo #ifndef __CONFIG_CGTQMX6EVAL_H 149b75bad0SSARTRE Leo #define __CONFIG_CGTQMX6EVAL_H 159b75bad0SSARTRE Leo 169b75bad0SSARTRE Leo #include "mx6_common.h" 179b75bad0SSARTRE Leo 189b75bad0SSARTRE Leo #define CONFIG_MACH_TYPE 4122 199b75bad0SSARTRE Leo 209b75bad0SSARTRE Leo /* Size of malloc() pool */ 219b75bad0SSARTRE Leo #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) 229b75bad0SSARTRE Leo 239b75bad0SSARTRE Leo #define CONFIG_BOARD_EARLY_INIT_F 249b75bad0SSARTRE Leo #define CONFIG_MISC_INIT_R 259b75bad0SSARTRE Leo 269b75bad0SSARTRE Leo #define CONFIG_MXC_UART 279b75bad0SSARTRE Leo #define CONFIG_MXC_UART_BASE UART2_BASE 289b75bad0SSARTRE Leo 299b75bad0SSARTRE Leo /* MMC Configs */ 309b75bad0SSARTRE Leo #define CONFIG_SYS_FSL_ESDHC_ADDR 0 319b75bad0SSARTRE Leo 329b75bad0SSARTRE Leo /* Miscellaneous commands */ 339b75bad0SSARTRE Leo #define CONFIG_CMD_BMODE 349b75bad0SSARTRE Leo 35862187b7SOtavio Salvador /* Thermal support */ 36862187b7SOtavio Salvador #define CONFIG_IMX6_THERMAL 37862187b7SOtavio Salvador 38862187b7SOtavio Salvador #define CONFIG_CMD_FUSE 39862187b7SOtavio Salvador #if defined(CONFIG_CMD_FUSE) || defined(CONFIG_IMX6_THERMAL) 40862187b7SOtavio Salvador #define CONFIG_MXC_OCOTP 41862187b7SOtavio Salvador #endif 42862187b7SOtavio Salvador 434c9929d6SOtavio Salvador /* I2C Configs */ 444c9929d6SOtavio Salvador #define CONFIG_CMD_I2C 454c9929d6SOtavio Salvador #define CONFIG_SYS_I2C 464c9929d6SOtavio Salvador #define CONFIG_SYS_I2C_MXC 474c9929d6SOtavio Salvador #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 484c9929d6SOtavio Salvador #define CONFIG_SYS_I2C_SPEED 100000 494c9929d6SOtavio Salvador 504c9929d6SOtavio Salvador /* PMIC */ 514c9929d6SOtavio Salvador #define CONFIG_POWER 524c9929d6SOtavio Salvador #define CONFIG_POWER_I2C 534c9929d6SOtavio Salvador #define CONFIG_POWER_PFUZE100 544c9929d6SOtavio Salvador #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 554c9929d6SOtavio Salvador 56*95246ac7SOtavio Salvador /* USB Configs */ 57*95246ac7SOtavio Salvador #define CONFIG_CMD_USB 58*95246ac7SOtavio Salvador #define CONFIG_CMD_FAT 59*95246ac7SOtavio Salvador #define CONFIG_USB_EHCI 60*95246ac7SOtavio Salvador #define CONFIG_USB_EHCI_MX6 61*95246ac7SOtavio Salvador #define CONFIG_USB_STORAGE 62*95246ac7SOtavio Salvador #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 63*95246ac7SOtavio Salvador #define CONFIG_USB_HOST_ETHER 64*95246ac7SOtavio Salvador #define CONFIG_USB_ETHER_ASIX 65*95246ac7SOtavio Salvador #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 66*95246ac7SOtavio Salvador #define CONFIG_MXC_USB_FLAGS 0 67*95246ac7SOtavio Salvador #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 /* Enabled USB controller number */ 68*95246ac7SOtavio Salvador #define CONFIG_USB_KEYBOARD 69*95246ac7SOtavio Salvador #define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP 70*95246ac7SOtavio Salvador 719b75bad0SSARTRE Leo #define CONFIG_DEFAULT_FDT_FILE "imx6q-congatec.dtb" 729b75bad0SSARTRE Leo 739b75bad0SSARTRE Leo #define CONFIG_EXTRA_ENV_SETTINGS \ 749b75bad0SSARTRE Leo "script=boot.scr\0" \ 754ac0c2bfSOtavio Salvador "image=zImage\0" \ 769b75bad0SSARTRE Leo "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \ 779b75bad0SSARTRE Leo "boot_dir=/boot\0" \ 789b75bad0SSARTRE Leo "console=ttymxc1\0" \ 799b75bad0SSARTRE Leo "fdt_high=0xffffffff\0" \ 809b75bad0SSARTRE Leo "initrd_high=0xffffffff\0" \ 816584a1b5SOtavio Salvador "fdt_addr=0x18000000\0" \ 829b75bad0SSARTRE Leo "boot_fdt=try\0" \ 839b75bad0SSARTRE Leo "mmcdev=1\0" \ 849b75bad0SSARTRE Leo "mmcpart=1\0" \ 859b75bad0SSARTRE Leo "mmcroot=/dev/mmcblk0p1 rootwait rw\0" \ 869b75bad0SSARTRE Leo "mmcargs=setenv bootargs console=${console},${baudrate} " \ 879b75bad0SSARTRE Leo "root=${mmcroot}\0" \ 889b75bad0SSARTRE Leo "loadbootscript=" \ 899b75bad0SSARTRE Leo "ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 909b75bad0SSARTRE Leo "bootscript=echo Running bootscript from mmc ...; " \ 919b75bad0SSARTRE Leo "source\0" \ 924ac0c2bfSOtavio Salvador "loadimage=ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} " \ 934ac0c2bfSOtavio Salvador "${boot_dir}/${image}\0" \ 949b75bad0SSARTRE Leo "loadfdt=ext2load mmc ${mmcdev}:${mmcpart} ${fdt_addr} " \ 959b75bad0SSARTRE Leo "${boot_dir}/${fdt_file}\0" \ 969b75bad0SSARTRE Leo "mmcboot=echo Booting from mmc ...; " \ 979b75bad0SSARTRE Leo "run mmcargs; " \ 989b75bad0SSARTRE Leo "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 999b75bad0SSARTRE Leo "if run loadfdt; then " \ 1004ac0c2bfSOtavio Salvador "bootz ${loadaddr} - ${fdt_addr}; " \ 1019b75bad0SSARTRE Leo "else " \ 1029b75bad0SSARTRE Leo "if test ${boot_fdt} = try; then " \ 1034ac0c2bfSOtavio Salvador "bootz; " \ 1049b75bad0SSARTRE Leo "else " \ 1059b75bad0SSARTRE Leo "echo WARN: Cannot load the DT; " \ 1069b75bad0SSARTRE Leo "fi; " \ 1079b75bad0SSARTRE Leo "fi; " \ 1089b75bad0SSARTRE Leo "else " \ 1094ac0c2bfSOtavio Salvador "bootz; " \ 1109b75bad0SSARTRE Leo "fi;\0" 1119b75bad0SSARTRE Leo 1129b75bad0SSARTRE Leo #define CONFIG_BOOTCOMMAND \ 1139b75bad0SSARTRE Leo "mmc dev ${mmcdev};" \ 1149b75bad0SSARTRE Leo "mmc dev ${mmcdev}; if mmc rescan; then " \ 1159b75bad0SSARTRE Leo "if run loadbootscript; then " \ 1169b75bad0SSARTRE Leo "run bootscript; " \ 1179b75bad0SSARTRE Leo "else " \ 1184ac0c2bfSOtavio Salvador "if run loadimage; then " \ 1199b75bad0SSARTRE Leo "run mmcboot; " \ 1209b75bad0SSARTRE Leo "else "\ 1219b75bad0SSARTRE Leo "echo ERR: Fail to boot from mmc; " \ 1229b75bad0SSARTRE Leo "fi; " \ 1239b75bad0SSARTRE Leo "fi; " \ 1249b75bad0SSARTRE Leo "else echo ERR: Fail to boot from mmc; fi" 1259b75bad0SSARTRE Leo 1269b75bad0SSARTRE Leo #define CONFIG_SYS_MEMTEST_START 0x10000000 1279b75bad0SSARTRE Leo #define CONFIG_SYS_MEMTEST_END 0x10010000 1289b75bad0SSARTRE Leo #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 1299b75bad0SSARTRE Leo 1309b75bad0SSARTRE Leo /* Physical Memory Map */ 1319b75bad0SSARTRE Leo #define CONFIG_NR_DRAM_BANKS 1 1329b75bad0SSARTRE Leo #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 1339b75bad0SSARTRE Leo #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024) 1349b75bad0SSARTRE Leo 1359b75bad0SSARTRE Leo #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 1369b75bad0SSARTRE Leo #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 1379b75bad0SSARTRE Leo #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 1389b75bad0SSARTRE Leo 1399b75bad0SSARTRE Leo #define CONFIG_SYS_INIT_SP_OFFSET \ 1409b75bad0SSARTRE Leo (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 1419b75bad0SSARTRE Leo #define CONFIG_SYS_INIT_SP_ADDR \ 1429b75bad0SSARTRE Leo (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 1439b75bad0SSARTRE Leo 144056845c2SPeter Robinson /* Environment organization */ 1459b75bad0SSARTRE Leo #define CONFIG_ENV_SIZE (8 * 1024) 1469b75bad0SSARTRE Leo 1479b75bad0SSARTRE Leo #define CONFIG_ENV_IS_IN_MMC 1489b75bad0SSARTRE Leo 1499b75bad0SSARTRE Leo #define CONFIG_ENV_OFFSET (6 * 64 * 1024) 1509b75bad0SSARTRE Leo #define CONFIG_SYS_MMC_ENV_DEV 0 1519b75bad0SSARTRE Leo 1529b75bad0SSARTRE Leo #endif /* __CONFIG_CGTQMX6EVAL_H */ 153