1 /*
2  * bur_am335x_common.h
3  *
4  * common parts used by B&R AM335x based boards
5  *
6  * Copyright (C) 2016 Hannes Schmelzer <oe5hpm@oevsv.at> -
7  * Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com
8  *
9  * SPDX-License-Identifier:        GPL-2.0+
10  */
11 
12 #ifndef __BUR_AM335X_COMMON_H__
13 #define __BUR_AM335X_COMMON_H__
14 /* ------------------------------------------------------------------------- */
15 #define CONFIG_AM33XX
16 #define CONFIG_MAX_RAM_BANK_SIZE	(1024 << 20)	/* 1GB */
17 
18 /* Timer information */
19 #define CONFIG_SYS_PTV			2	/* Divisor: 2^(PTV+1) => 8 */
20 #define CONFIG_SYS_TIMERBASE		0x48040000	/* Use Timer2 */
21 #define CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC	/* enable 32kHz OSC at bootime */
22 #define CONFIG_POWER_TPS65217
23 
24 #include <asm/arch/omap.h>
25 
26 /* NS16550 Configuration */
27 #define CONFIG_SYS_NS16550_SERIAL
28 #define CONFIG_SYS_NS16550_REG_SIZE	(-4)
29 #define CONFIG_SYS_NS16550_CLK		48000000
30 #define CONFIG_SYS_NS16550_COM1		0x44e09000	/* UART0 */
31 
32 /* Network defines */
33 #define CONFIG_DRIVER_TI_CPSW		/* Driver for IP block */
34 #define CONFIG_MII			/* Required in net/eth.c */
35 #define CONFIG_PHYLIB
36 #define CONFIG_PHY_NATSEMI
37 
38 /*
39  * SPL related defines.  The Public RAM memory map the ROM defines the
40  * area between 0x402F0400 and 0x4030B800 as a download area and
41  * 0x4030B800 to 0x4030CE00 as a public stack area.  The ROM also
42  * supports X-MODEM loading via UART, and we leverage this and then use
43  * Y-MODEM to load u-boot.img, when booted over UART.  We must also include
44  * the scratch space that U-Boot uses in SRAM.
45  */
46 #define CONFIG_SPL_TEXT_BASE		0x402F0400
47 #define CONFIG_SPL_MAX_SIZE		(SRAM_SCRATCH_SPACE_ADDR - \
48 					 CONFIG_SPL_TEXT_BASE)
49 
50 /*
51  * Since SPL did pll and ddr initialization for us,
52  * we don't need to do it twice.
53  */
54 #if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_NOR_BOOT)
55 #define CONFIG_SKIP_LOWLEVEL_INIT
56 #endif /* !CONFIG_SPL_BUILD, ... */
57 /*
58  * Our DDR memory always starts at 0x80000000 and U-Boot shall have
59  * relocated itself to higher in memory by the time this value is used.
60  */
61 #define CONFIG_SYS_LOAD_ADDR		0x80000000
62 /*
63  * ----------------------------------------------------------------------------
64  * DDR information.  We say (for simplicity) that we have 1 bank,
65  * always, even when we have more.  We always start at 0x80000000,
66  * and we place the initial stack pointer in our SRAM.
67  */
68 #define CONFIG_NR_DRAM_BANKS		1
69 #define CONFIG_SYS_SDRAM_BASE		0x80000000
70 #define CONFIG_SYS_INIT_SP_ADDR		(NON_SECURE_SRAM_END - \
71 					GENERATED_GBL_DATA_SIZE)
72 
73 /* I2C */
74 #define CONFIG_SYS_I2C
75 #define CONFIG_SYS_OMAP24_I2C_SPEED	100000
76 #define CONFIG_SYS_OMAP24_I2C_SLAVE	1
77 #define CONFIG_SYS_I2C_OMAP24XX
78 
79 /*
80  * Our platforms make use of SPL to initalize the hardware (primarily
81  * memory) enough for full U-Boot to be loaded.  We also support Falcon
82  * Mode so that the Linux kernel can be booted directly from SPL
83  * instead, if desired.  We make use of the general SPL framework found
84  * under common/spl/.  Given our generally common memory map, we set a
85  * number of related defaults and sizes here.
86  */
87 #define CONFIG_SPL_FRAMEWORK
88 /*
89  * Place the image at the start of the ROM defined image space.
90  * We limit our size to the ROM-defined downloaded image area, and use the
91  * rest of the space for stack.  We load U-Boot itself into memory at
92  * 0x80800000 for legacy reasons (to not conflict with older SPLs).  We
93  * have our BSS be placed 1MiB after this, to allow for the default
94  * Linux kernel address of 0x80008000 to work, in the Falcon Mode case.
95  * We have the SPL malloc pool at the end of the BSS area.
96  *
97  * ----------------------------------------------------------------------------
98  */
99 #undef  CONFIG_SYS_TEXT_BASE
100 #define CONFIG_SYS_TEXT_BASE		0x80800000
101 #define CONFIG_SPL_BSS_START_ADDR	0x80A00000
102 #define CONFIG_SPL_BSS_MAX_SIZE		0x80000		/* 512 KB */
103 #define CONFIG_SYS_SPL_MALLOC_START	(CONFIG_SPL_BSS_START_ADDR + \
104 					CONFIG_SPL_BSS_MAX_SIZE)
105 #define CONFIG_SYS_SPL_MALLOC_SIZE	CONFIG_SYS_MALLOC_LEN
106 
107 /* General parts of the framework, required. */
108 #define CONFIG_SPL_LDSCRIPT		"arch/arm/mach-omap2/u-boot-spl.lds"
109 
110 #endif	/* ! __BUR_AM335X_COMMON_H__ */
111