1 /* 2 * bur_am335x_common.h 3 * 4 * common parts used by B&R AM335x based boards 5 * 6 * Copyright (C) 2016 Hannes Schmelzer <oe5hpm@oevsv.at> - 7 * Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com 8 * 9 * SPDX-License-Identifier: GPL-2.0+ 10 */ 11 12 #ifndef __BUR_AM335X_COMMON_H__ 13 #define __BUR_AM335X_COMMON_H__ 14 /* ------------------------------------------------------------------------- */ 15 #define CONFIG_AM33XX 16 #define CONFIG_OMAP 17 #define CONFIG_OMAP_COMMON 18 #define CONFIG_SYS_CACHELINE_SIZE 64 19 #define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */ 20 21 /* Timer information */ 22 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 23 #define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */ 24 #define CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC /* enable 32kHz OSC at bootime */ 25 #define CONFIG_SPL_POWER_SUPPORT 26 #define CONFIG_POWER_TPS65217 27 28 #define CONFIG_SYS_NO_FLASH /* have no NOR-flash */ 29 30 #include <asm/arch/omap.h> 31 32 /* NS16550 Configuration */ 33 #define CONFIG_SYS_NS16550_SERIAL 34 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 35 #define CONFIG_SYS_NS16550_CLK 48000000 36 #define CONFIG_SYS_NS16550_COM1 0x44e09000 /* UART0 */ 37 #define CONFIG_BAUDRATE 115200 38 39 /* Network defines */ 40 #define CONFIG_DRIVER_TI_CPSW /* Driver for IP block */ 41 #define CONFIG_MII /* Required in net/eth.c */ 42 #define CONFIG_PHYLIB 43 #define CONFIG_PHY_NATSEMI 44 45 /* 46 * SPL related defines. The Public RAM memory map the ROM defines the 47 * area between 0x402F0400 and 0x4030B800 as a download area and 48 * 0x4030B800 to 0x4030CE00 as a public stack area. The ROM also 49 * supports X-MODEM loading via UART, and we leverage this and then use 50 * Y-MODEM to load u-boot.img, when booted over UART. 51 */ 52 #define CONFIG_SPL_TEXT_BASE 0x402F0400 53 #define CONFIG_SPL_MAX_SIZE (0x4030B800 - CONFIG_SPL_TEXT_BASE) 54 55 /* 56 * Since SPL did pll and ddr initialization for us, 57 * we don't need to do it twice. 58 */ 59 #if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_NOR_BOOT) 60 #define CONFIG_SKIP_LOWLEVEL_INIT 61 #endif /* !CONFIG_SPL_BUILD, ... */ 62 /* 63 * Our DDR memory always starts at 0x80000000 and U-Boot shall have 64 * relocated itself to higher in memory by the time this value is used. 65 */ 66 #define CONFIG_SYS_LOAD_ADDR 0x80000000 67 /* 68 * ---------------------------------------------------------------------------- 69 * DDR information. We say (for simplicity) that we have 1 bank, 70 * always, even when we have more. We always start at 0x80000000, 71 * and we place the initial stack pointer in our SRAM. 72 */ 73 #define CONFIG_NR_DRAM_BANKS 1 74 #define CONFIG_SYS_SDRAM_BASE 0x80000000 75 #define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \ 76 GENERATED_GBL_DATA_SIZE) 77 78 /* I2C */ 79 #define CONFIG_SYS_I2C 80 #define CONFIG_SYS_OMAP24_I2C_SPEED 100000 81 #define CONFIG_SYS_OMAP24_I2C_SLAVE 1 82 #define CONFIG_SYS_I2C_OMAP24XX 83 /* GPIO */ 84 #define CONFIG_OMAP_GPIO 85 86 /* 87 * Our platforms make use of SPL to initalize the hardware (primarily 88 * memory) enough for full U-Boot to be loaded. We also support Falcon 89 * Mode so that the Linux kernel can be booted directly from SPL 90 * instead, if desired. We make use of the general SPL framework found 91 * under common/spl/. Given our generally common memory map, we set a 92 * number of related defaults and sizes here. 93 */ 94 #define CONFIG_SPL_FRAMEWORK 95 /* 96 * Place the image at the start of the ROM defined image space. 97 * We limit our size to the ROM-defined downloaded image area, and use the 98 * rest of the space for stack. We load U-Boot itself into memory at 99 * 0x80800000 for legacy reasons (to not conflict with older SPLs). We 100 * have our BSS be placed 1MiB after this, to allow for the default 101 * Linux kernel address of 0x80008000 to work, in the Falcon Mode case. 102 * We have the SPL malloc pool at the end of the BSS area. 103 * 104 * ---------------------------------------------------------------------------- 105 */ 106 #undef CONFIG_SYS_TEXT_BASE 107 #define CONFIG_SYS_TEXT_BASE 0x80800000 108 #define CONFIG_SPL_BSS_START_ADDR 0x80A00000 109 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ 110 #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ 111 CONFIG_SPL_BSS_MAX_SIZE) 112 #define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN 113 114 /* General parts of the framework, required. */ 115 #define CONFIG_SPL_I2C_SUPPORT 116 #define CONFIG_SPL_LIBCOMMON_SUPPORT 117 #define CONFIG_SPL_LIBGENERIC_SUPPORT 118 #define CONFIG_SPL_SERIAL_SUPPORT 119 #define CONFIG_SPL_BOARD_INIT 120 #define CONFIG_SPL_YMODEM_SUPPORT 121 #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds" 122 123 #endif /* ! __BUR_AM335X_COMMON_H__ */ 124