1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * brtpp1.h 4 * 5 * specific parts for B&R T-Series Motherboard 6 * 7 * Copyright (C) 2013 Hannes Schmelzer <oe5hpm@oevsv.at> - 8 * Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com 9 */ 10 11 #ifndef __CONFIG_BRPPT1_H__ 12 #define __CONFIG_BRPPT1_H__ 13 14 #include <configs/bur_cfg_common.h> 15 #include <configs/bur_am335x_common.h> 16 /* ------------------------------------------------------------------------- */ 17 /* memory */ 18 #define CONFIG_SYS_MALLOC_LEN (5 * 1024 * 1024) 19 #define CONFIG_SYS_BOOTM_LEN SZ_32M 20 21 /* Clock Defines */ 22 #define V_OSCK 26000000 /* Clock output from T2 */ 23 #define V_SCLK (V_OSCK) 24 25 #define CONFIG_POWER_TPS65217 26 27 /* Support both device trees and ATAGs. */ 28 #define CONFIG_CMDLINE_TAG 29 #define CONFIG_SETUP_MEMORY_TAGS 30 #define CONFIG_INITRD_TAG 31 /*#define CONFIG_MACH_TYPE 3589*/ 32 #define CONFIG_MACH_TYPE 0xFFFFFFFF /* TODO: check with kernel*/ 33 34 /* MMC/SD IP block */ 35 #if defined(CONFIG_EMMC_BOOT) 36 #define CONFIG_SUPPORT_EMMC_BOOT 37 #endif /* CONFIG_EMMC_BOOT */ 38 39 /* 40 * When we have NAND flash we expect to be making use of mtdparts, 41 * both for ease of use in U-Boot and for passing information on to 42 * the Linux kernel. 43 */ 44 #if defined(CONFIG_NAND) 45 #define CONFIG_MTD_DEVICE /* Required for mtdparts */ 46 #endif 47 48 #ifdef CONFIG_NAND 49 #define CONFIG_SPL_NAND_BASE 50 #define CONFIG_SPL_NAND_DRIVERS 51 #define CONFIG_SPL_NAND_ECC 52 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 53 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 54 #endif /* CONFIG_NAND */ 55 56 /* Always 64 KiB env size */ 57 #define CONFIG_ENV_SIZE (64 << 10) 58 59 #ifdef CONFIG_NAND 60 #define NANDTGTS \ 61 "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ 62 "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ 63 "cfgscr=nand read ${cfgaddr} cfgscr && source ${cfgaddr}\0" \ 64 "nandargs=setenv bootargs console=${console} ${optargs} ${optargs_rot} " \ 65 "root=mtd6 rootfstype=jffs2 b_mode=${b_mode}\0" \ 66 "b_nand=nand read ${loadaddr} kernel; nand read ${dtbaddr} dtb; " \ 67 "run nandargs; run cfgscr; bootz ${loadaddr} - ${dtbaddr}\0" \ 68 "b_tgts_std=usb0 nand net\0" \ 69 "b_tgts_rcy=net usb0 nand\0" \ 70 "b_tgts_pme=usb0 nand net\0" 71 #else 72 #define NANDTGTS "" 73 #endif /* CONFIG_NAND */ 74 75 #define MMCSPI_TGTS \ 76 "t30args#0=setenv bootargs ${optargs_rot} ${optargs} console=${console} " \ 77 "b_mode=${b_mode} root=/dev/mmcblk0p2 rootfstype=ext4\0" \ 78 "b_t30lgcy#0=" \ 79 "load ${loaddev}:2 ${loadaddr} /boot/PPTImage.md5 && " \ 80 "load ${loaddev}:2 ${loadaddr} /boot/zImage && " \ 81 "load ${loaddev}:2 ${dtbaddr} /boot/am335x-ppt30.dtb || " \ 82 "load ${loaddev}:1 ${dtbaddr} am335x-ppt30-legacy.dtb; "\ 83 "run t30args#0; run cfgscr; bootz ${loadaddr} - ${dtbaddr}\0" \ 84 "t30args#1=setenv bootargs ${optargs_rot} ${optargs} console=${console} " \ 85 "b_mode=${b_mode}\0" \ 86 "b_t30lgcy#1=" \ 87 "load ${loaddev}:1 ${loadaddr} zImage && " \ 88 "load ${loaddev}:1 ${dtbaddr} am335x-ppt30.dtb && " \ 89 "load ${loaddev}:1 ${ramaddr} rootfsPPT30.uboot && " \ 90 "run t30args#1; run cfgscr; bootz ${loadaddr} ${ramaddr} ${dtbaddr}\0" \ 91 "b_mmc0=load ${loaddev}:1 ${scraddr} bootscr.img && source ${scraddr}\0" \ 92 "b_mmc1=load ${loaddev}:1 ${scraddr} /boot/bootscr.img && source ${scraddr}\0" \ 93 "b_tgts_std=mmc0 mmc1 t30lgcy#0 t30lgcy#1 usb0 net\0" \ 94 "b_tgts_rcy=t30lgcy#1 usb0 net\0" \ 95 "b_tgts_pme=net usb0 mmc0 mmc1\0" \ 96 "loaddev=mmc 1\0" 97 98 #ifdef CONFIG_ENV_IS_IN_MMC 99 #define MMCTGTS \ 100 MMCSPI_TGTS \ 101 "cfgscr=mmc dev 1; mmc read ${cfgaddr} 200 80; source ${cfgaddr}\0" 102 #else 103 #define MMCTGTS "" 104 #endif /* CONFIG_MMC */ 105 106 #ifdef CONFIG_SPI 107 #define SPITGTS \ 108 MMCSPI_TGTS \ 109 "cfgscr=sf probe; sf read ${cfgaddr} 0xC0000 10000; source ${cfgaddr}\0" 110 #else 111 #define SPITGTS "" 112 #endif /* CONFIG_SPI */ 113 114 #define LOAD_OFFSET(x) 0x8##x 115 116 #ifndef CONFIG_SPL_BUILD 117 #define CONFIG_EXTRA_ENV_SETTINGS \ 118 BUR_COMMON_ENV \ 119 "verify=no\0" \ 120 "autoload=0\0" \ 121 "scraddr=" __stringify(LOAD_OFFSET(0000000)) "\0" \ 122 "cfgaddr=" __stringify(LOAD_OFFSET(0020000)) "\0" \ 123 "dtbaddr=" __stringify(LOAD_OFFSET(0040000)) "\0" \ 124 "loadaddr=" __stringify(LOAD_OFFSET(0100000)) "\0" \ 125 "ramaddr=" __stringify(LOAD_OFFSET(2000000)) "\0" \ 126 "console=ttyO0,115200n8\0" \ 127 "optargs=consoleblank=0 quiet panic=2\0" \ 128 "b_break=0\0" \ 129 "b_usb0=usb start && load usb 0 ${scraddr} bootscr.img && source ${scraddr}\0" \ 130 "b_net=tftp ${scraddr} netscript.img && source ${scraddr}\0" \ 131 MMCTGTS \ 132 SPITGTS \ 133 NANDTGTS \ 134 "b_deftgts=if test ${b_mode} = 12; then setenv b_tgts ${b_tgts_pme};" \ 135 " elif test ${b_mode} = 0; then setenv b_tgts ${b_tgts_rcy};" \ 136 " else setenv b_tgts ${b_tgts_std}; fi\0" \ 137 "b_default=run b_deftgts; for target in ${b_tgts};"\ 138 " do echo \"### booting ${target} ###\"; run b_${target};" \ 139 " if test ${b_break} = 1; then; exit; fi; done\0" 140 #endif /* !CONFIG_SPL_BUILD*/ 141 142 #ifdef CONFIG_NAND 143 /* 144 * GPMC block. We support 1 device and the physical address to 145 * access CS0 at is 0x8000000. 146 */ 147 #define CONFIG_SYS_MAX_NAND_DEVICE 1 148 #define CONFIG_SYS_NAND_BASE 0x8000000 149 /* don't change OMAP_ELM, ECCSCHEME. ROM code only supports this */ 150 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW 151 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 152 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) 153 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 154 #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ 155 CONFIG_SYS_NAND_PAGE_SIZE) 156 #define CONFIG_SYS_NAND_OOBSIZE 64 157 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS 158 #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9, \ 159 10, 11, 12, 13, 14, 15, 16, 17, \ 160 18, 19, 20, 21, 22, 23, 24, 25, \ 161 26, 27, 28, 29, 30, 31, 32, 33, \ 162 34, 35, 36, 37, 38, 39, 40, 41, \ 163 42, 43, 44, 45, 46, 47, 48, 49, \ 164 50, 51, 52, 53, 54, 55, 56, 57, } 165 166 #define CONFIG_SYS_NAND_ECCSIZE 512 167 #define CONFIG_SYS_NAND_ECCBYTES 14 168 169 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 170 171 #define CONFIG_NAND_OMAP_GPMC_WSCFG 1 172 #endif /* CONFIG_NAND */ 173 174 /* USB configuration */ 175 #define CONFIG_USB_MUSB_DISABLE_BULK_COMBINE_SPLIT 176 177 #if defined(CONFIG_SPI) 178 /* SPI Flash */ 179 #define CONFIG_SF_DEFAULT_SPEED 24000000 180 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x40000 181 /* Environment */ 182 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT 183 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 184 #define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE 185 #define CONFIG_ENV_OFFSET 0x20000 186 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \ 187 CONFIG_ENV_SECT_SIZE) 188 #elif defined(CONFIG_ENV_IS_IN_MMC) 189 #define CONFIG_SYS_MMC_ENV_DEV 1 190 #define CONFIG_SYS_MMC_ENV_PART 2 191 #define CONFIG_ENV_OFFSET 0x40000 /* TODO: Adresse definieren */ 192 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) 193 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT 194 195 #elif defined(CONFIG_ENV_IS_IN_NAND) 196 /* No NAND env support in SPL */ 197 #define CONFIG_ENV_OFFSET 0x60000 198 #define CONFIG_SYS_ENV_SECT_SIZE CONFIG_ENV_SIZE 199 #else 200 #error "no storage for Environment defined!" 201 #endif 202 203 #endif /* ! __CONFIG_BRPPT1_H__ */ 204