xref: /openbmc/u-boot/include/configs/brppt1.h (revision cd71b1d5)
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * brtpp1.h
4  *
5  * specific parts for B&R T-Series Motherboard
6  *
7  * Copyright (C) 2013 Hannes Schmelzer <oe5hpm@oevsv.at> -
8  * Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com
9  */
10 
11 #ifndef __CONFIG_BRPPT1_H__
12 #define __CONFIG_BRPPT1_H__
13 
14 #include <configs/bur_cfg_common.h>
15 #include <configs/bur_am335x_common.h>
16 /* ------------------------------------------------------------------------- */
17 /* memory */
18 #define CONFIG_SYS_MALLOC_LEN		(5 * 1024 * 1024)
19 #define CONFIG_SYS_BOOTM_LEN		SZ_32M
20 
21 /* Clock Defines */
22 #define V_OSCK				26000000  /* Clock output from T2 */
23 #define V_SCLK				(V_OSCK)
24 
25 #define CONFIG_POWER_TPS65217
26 
27 /* Support both device trees and ATAGs. */
28 #define CONFIG_CMDLINE_TAG
29 #define CONFIG_SETUP_MEMORY_TAGS
30 #define CONFIG_INITRD_TAG
31 /*#define CONFIG_MACH_TYPE		3589*/
32 #define CONFIG_MACH_TYPE		0xFFFFFFFF /* TODO: check with kernel*/
33 
34 /* MMC/SD IP block */
35 #if defined(CONFIG_EMMC_BOOT)
36  #define CONFIG_SUPPORT_EMMC_BOOT
37 #endif /* CONFIG_EMMC_BOOT */
38 
39 /*
40  * When we have NAND flash we expect to be making use of mtdparts,
41  * both for ease of use in U-Boot and for passing information on to
42  * the Linux kernel.
43  */
44 
45 #ifdef CONFIG_SPL_OS_BOOT
46 #define CONFIG_SYS_SPL_ARGS_ADDR		0x80F80000
47 
48 /* RAW SD card / eMMC */
49 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR	0x900	/* address 0x120000 */
50 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR	0x80	/* address 0x10000 */
51 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS	0x80	/* 64KiB */
52 
53 /* NAND */
54 #ifdef CONFIG_NAND
55 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS		0x140000
56 #endif /* CONFIG_NAND */
57 #endif /* CONFIG_SPL_OS_BOOT */
58 
59 #ifdef CONFIG_NAND
60 #define CONFIG_SPL_NAND_BASE
61 #define CONFIG_SPL_NAND_DRIVERS
62 #define CONFIG_SPL_NAND_ECC
63 #define CONFIG_SYS_NAND_U_BOOT_START	CONFIG_SYS_TEXT_BASE
64 #define CONFIG_SYS_NAND_U_BOOT_OFFS	0x80000
65 #endif /* CONFIG_NAND */
66 
67 /* Always 64 KiB env size */
68 #define CONFIG_ENV_SIZE			(64 << 10)
69 
70 #ifdef CONFIG_NAND
71 #define NANDTGTS \
72 "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \
73 "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
74 "cfgscr=nand read ${cfgaddr} cfgscr && source ${cfgaddr}\0" \
75 "nandargs=setenv bootargs console=${console} ${optargs} ${optargs_rot} " \
76 	"root=mtd6 rootfstype=jffs2 b_mode=${b_mode}\0" \
77 "b_nand=nand read ${loadaddr} kernel; nand read ${dtbaddr} dtb; " \
78 	"run nandargs; run cfgscr; bootz ${loadaddr} - ${dtbaddr}\0" \
79 "b_tgts_std=usb0 nand net\0" \
80 "b_tgts_rcy=net usb0 nand\0" \
81 "b_tgts_pme=usb0 nand net\0"
82 #else
83 #define NANDTGTS ""
84 #endif /* CONFIG_NAND */
85 
86 #define MMCSPI_TGTS \
87 "t30args#0=setenv bootargs ${optargs_rot} ${optargs} console=${console} " \
88 	"b_mode=${b_mode} root=/dev/mmcblk0p2 rootfstype=ext4\0" \
89 "b_t30lgcy#0=" \
90 	"load ${loaddev}:2 ${loadaddr} /boot/PPTImage.md5 && " \
91 	"load ${loaddev}:2 ${loadaddr} /boot/zImage && " \
92 	"load ${loaddev}:2 ${dtbaddr} /boot/am335x-ppt30.dtb || " \
93 	"load ${loaddev}:1 ${dtbaddr} am335x-ppt30-legacy.dtb; "\
94 	"run t30args#0; run cfgscr; bootz ${loadaddr} - ${dtbaddr}\0" \
95 "t30args#1=setenv bootargs ${optargs_rot} ${optargs} console=${console} " \
96 	"b_mode=${b_mode}\0" \
97 "b_t30lgcy#1=" \
98 	"load ${loaddev}:1 ${loadaddr} zImage && " \
99 	"load ${loaddev}:1 ${dtbaddr} am335x-ppt30.dtb && " \
100 	"load ${loaddev}:1 ${ramaddr} rootfsPPT30.uboot && " \
101 	"run t30args#1; run cfgscr; bootz ${loadaddr} ${ramaddr} ${dtbaddr}\0" \
102 "b_mmc0=load ${loaddev}:1 ${scraddr} bootscr.img && source ${scraddr}\0" \
103 "b_mmc1=load ${loaddev}:1 ${scraddr} /boot/bootscr.img && source ${scraddr}\0" \
104 "b_tgts_std=mmc0 mmc1 t30lgcy#0 t30lgcy#1 usb0 net\0" \
105 "b_tgts_rcy=t30lgcy#1 usb0 net\0" \
106 "b_tgts_pme=net usb0 mmc0 mmc1\0" \
107 "loaddev=mmc 1\0"
108 
109 #ifdef CONFIG_ENV_IS_IN_MMC
110 #define MMCTGTS \
111 MMCSPI_TGTS \
112 "cfgscr=mmc dev 1; mmc read ${cfgaddr} 200 80; source ${cfgaddr}\0"
113 #else
114 #define MMCTGTS ""
115 #endif /* CONFIG_MMC */
116 
117 #ifdef CONFIG_SPI
118 #define SPITGTS \
119 MMCSPI_TGTS \
120 "cfgscr=sf probe; sf read ${cfgaddr} 0xC0000 10000; source ${cfgaddr}\0"
121 #else
122 #define SPITGTS ""
123 #endif /* CONFIG_SPI */
124 
125 #define LOAD_OFFSET(x)			0x8##x
126 
127 #ifndef CONFIG_SPL_BUILD
128 #define CONFIG_EXTRA_ENV_SETTINGS \
129 BUR_COMMON_ENV \
130 "verify=no\0" \
131 "autoload=0\0" \
132 "scraddr=" __stringify(LOAD_OFFSET(0000000)) "\0" \
133 "cfgaddr=" __stringify(LOAD_OFFSET(0020000)) "\0" \
134 "dtbaddr=" __stringify(LOAD_OFFSET(0040000)) "\0" \
135 "loadaddr=" __stringify(LOAD_OFFSET(0100000)) "\0" \
136 "ramaddr=" __stringify(LOAD_OFFSET(2000000)) "\0" \
137 "console=ttyO0,115200n8\0" \
138 "optargs=consoleblank=0 quiet panic=2\0" \
139 "b_break=0\0" \
140 "b_usb0=usb start && load usb 0 ${scraddr} bootscr.img && source ${scraddr}\0" \
141 "b_net=tftp ${scraddr} netscript.img && source ${scraddr}\0" \
142 MMCTGTS \
143 SPITGTS \
144 NANDTGTS \
145 "b_deftgts=if test ${b_mode} = 12; then setenv b_tgts ${b_tgts_pme};" \
146 " elif test ${b_mode} = 0; then setenv b_tgts ${b_tgts_rcy};" \
147 " else setenv b_tgts ${b_tgts_std}; fi\0" \
148 "b_default=run b_deftgts; for target in ${b_tgts};"\
149 " do echo \"### booting ${target} ###\"; run b_${target};" \
150 " if test ${b_break} = 1; then; exit; fi; done\0"
151 #endif /* !CONFIG_SPL_BUILD*/
152 
153 #ifdef CONFIG_NAND
154 /*
155  * GPMC  block.  We support 1 device and the physical address to
156  * access CS0 at is 0x8000000.
157  */
158 #define CONFIG_SYS_MAX_NAND_DEVICE	1
159 #define CONFIG_SYS_NAND_BASE		0x8000000
160 /* don't change OMAP_ELM, ECCSCHEME. ROM code only supports this */
161 #define CONFIG_NAND_OMAP_ECCSCHEME	OMAP_ECC_BCH8_CODE_HW
162 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
163 #define CONFIG_SYS_NAND_BLOCK_SIZE	(128*1024)
164 #define CONFIG_SYS_NAND_PAGE_SIZE	2048
165 #define CONFIG_SYS_NAND_PAGE_COUNT	(CONFIG_SYS_NAND_BLOCK_SIZE / \
166 					CONFIG_SYS_NAND_PAGE_SIZE)
167 #define CONFIG_SYS_NAND_OOBSIZE		64
168 #define CONFIG_SYS_NAND_BAD_BLOCK_POS	NAND_LARGE_BADBLOCK_POS
169 #define CONFIG_SYS_NAND_ECCPOS		{2, 3, 4, 5, 6, 7, 8, 9, \
170 					10, 11, 12, 13, 14, 15, 16, 17, \
171 					18, 19, 20, 21, 22, 23, 24, 25, \
172 					26, 27, 28, 29, 30, 31, 32, 33, \
173 					34, 35, 36, 37, 38, 39, 40, 41, \
174 					42, 43, 44, 45, 46, 47, 48, 49, \
175 					50, 51, 52, 53, 54, 55, 56, 57, }
176 
177 #define CONFIG_SYS_NAND_ECCSIZE		512
178 #define CONFIG_SYS_NAND_ECCBYTES	14
179 
180 #define CONFIG_SYS_NAND_U_BOOT_START	CONFIG_SYS_TEXT_BASE
181 
182 #define CONFIG_NAND_OMAP_GPMC_WSCFG	1
183 #endif /* CONFIG_NAND */
184 
185 /* USB configuration */
186 #define CONFIG_USB_MUSB_DISABLE_BULK_COMBINE_SPLIT
187 
188 #if defined(CONFIG_SPI)
189 /* SPI Flash */
190 #define CONFIG_SF_DEFAULT_SPEED			24000000
191 #define CONFIG_SYS_SPI_U_BOOT_OFFS		0x40000
192 /* Environment */
193 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
194 #define CONFIG_ENV_SPI_MAX_HZ			CONFIG_SF_DEFAULT_SPEED
195 #define CONFIG_ENV_SECT_SIZE			CONFIG_ENV_SIZE
196 #define CONFIG_ENV_OFFSET			0x20000
197 #define CONFIG_ENV_OFFSET_REDUND		(CONFIG_ENV_OFFSET + \
198 						 CONFIG_ENV_SECT_SIZE)
199 #elif defined(CONFIG_ENV_IS_IN_MMC)
200 #define CONFIG_SYS_MMC_ENV_DEV		1
201 #define CONFIG_SYS_MMC_ENV_PART		2
202 #define CONFIG_ENV_OFFSET		0x40000	/* TODO: Adresse definieren */
203 #define CONFIG_ENV_OFFSET_REDUND	(CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
204 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
205 
206 #elif defined(CONFIG_ENV_IS_IN_NAND)
207 /* No NAND env support in SPL */
208 #define CONFIG_ENV_OFFSET		0x60000
209 #define CONFIG_SYS_ENV_SECT_SIZE	CONFIG_ENV_SIZE
210 #else
211 #error "no storage for Environment defined!"
212 #endif
213 
214 #endif	/* ! __CONFIG_BRPPT1_H__ */
215