xref: /openbmc/u-boot/include/configs/blanche.h (revision 0093b3fc)
1 /*
2  * include/configs/blanche.h
3  *     This file is blanche board configuration.
4  *
5  * Copyright (C) 2016 Renesas Electronics Corporation
6  *
7  * SPDX-License-Identifier: GPL-2.0
8  */
9 
10 #ifndef __BLANCHE_H
11 #define __BLANCHE_H
12 
13 #undef DEBUG
14 #define CONFIG_RMOBILE_BOARD_STRING "Blanche"
15 
16 #include "rcar-gen2-common.h"
17 
18 /* STACK */
19 #define CONFIG_SYS_INIT_SP_ADDR		0xE817FFFC
20 #define STACK_AREA_SIZE			0xC000
21 #define LOW_LEVEL_MERAM_STACK	\
22 		(CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
23 
24 /* MEMORY */
25 #define RCAR_GEN2_SDRAM_BASE		0x40000000
26 #define RCAR_GEN2_SDRAM_SIZE		(1024u * 1024 * 1024)
27 #define RCAR_GEN2_UBOOT_SDRAM_SIZE	(512 * 1024 * 1024)
28 
29 /* SCIF */
30 #define CONFIG_CONS_SCIF0
31 
32 #define CONFIG_SYS_MEMTEST_START	(RCAR_GEN2_SDRAM_BASE)
33 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 504 * 1024 * 1024)
34 
35 #undef	CONFIG_SYS_ALT_MEMTEST
36 #undef	CONFIG_SYS_MEMTEST_SCRATCH
37 #undef	CONFIG_SYS_LOADS_BAUD_CHANGE
38 
39 /* FLASH */
40 #if !defined(CONFIG_MTD_NOR_FLASH)
41 #define CONFIG_SYS_TEXT_BASE	0x40000000
42 #define CONFIG_SPI
43 #define CONFIG_SH_QSPI
44 #define CONFIG_SH_QSPI_BASE	0xE6B10000
45 #else
46 #define CONFIG_SYS_TEXT_BASE		0x00000000
47 #define CONFIG_SYS_FLASH_CFI
48 #define CONFIG_SYS_FLASH_CFI_WIDTH	FLASH_CFI_16BIT
49 #define CONFIG_FLASH_CFI_DRIVER
50 #define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
51 #define CONFIG_FLASH_SHOW_PROGRESS	45
52 #define CONFIG_SYS_FLASH_BASE		0x00000000
53 #define CONFIG_SYS_FLASH_SIZE		0x04000000	/* 64 MB */
54 #define CONFIG_SYS_MAX_FLASH_SECT	1024
55 #define CONFIG_SYS_MAX_FLASH_BANKS	1
56 #define CONFIG_SYS_FLASH_BANKS_LIST	{ (CONFIG_SYS_FLASH_BASE) }
57 #define CONFIG_SYS_FLASH_BANKS_SIZES	{ (CONFIG_SYS_FLASH_SIZE) }
58 
59 #define CONFIG_SYS_FLASH_ERASE_TOUT	3000
60 #define CONFIG_SYS_FLASH_WRITE_TOUT	3000
61 #define CONFIG_SYS_FLASH_LOCK_TOUT	3000
62 #define CONFIG_SYS_FLASH_UNLOCK_TOUT	3000
63 #undef  CONFIG_CMD_SF
64 #undef  CONFIG_CMD_SPI
65 #endif
66 
67 
68 /* Board Clock */
69 #define RMOBILE_XTAL_CLK	20000000u
70 #define CONFIG_SYS_CLK_FREQ	RMOBILE_XTAL_CLK
71 #define CONFIG_SH_TMU_CLK_FREQ	(CONFIG_SYS_CLK_FREQ / 2) /* EXT / 2 */
72 #define CONFIG_SYS_TMU_CLK_DIV	4
73 
74 /* ENV setting */
75 #if !defined(CONFIG_MTD_NOR_FLASH)
76 #else
77 #undef  CONFIG_ENV_ADDR
78 #define CONFIG_ENV_SECT_SIZE	(256 * 1024)
79 #define CONFIG_ENV_ADDR		(CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
80 #define CONFIG_ENV_OFFSET	(CONFIG_ENV_ADDR)
81 #define CONFIG_ENV_SIZE		(CONFIG_ENV_SECT_SIZE)
82 #define CONFIG_ENV_SIZE_REDUND	(CONFIG_SYS_MONITOR_LEN)
83 #endif
84 
85 /* Module stop status bits */
86 /* INTC-RT */
87 #define CONFIG_SMSTP0_ENA	0x00400000
88 /* SDHI0 */
89 #define CONFIG_SMSTP3_ENA	0x00004000
90 /* INTC-SYS, IRQC */
91 #define CONFIG_SMSTP4_ENA	0x00000180
92 /* SCIF0 */
93 #define CONFIG_SMSTP7_ENA	0x00200000
94 /* QSPI */
95 #define CONFIG_SMSTP9_ENA	0x00020000
96 /* SYS-DMAC0 */
97 #define CONFIG_RMSTP2_ENA	0x00080000
98 
99 /* SDHI */
100 #define CONFIG_SH_SDHI_FREQ	97500000
101 #define HAVE_BLOCK_DEVICE
102 
103 #endif	/* __BLANCHE_H */
104