xref: /openbmc/u-boot/include/configs/axs10x.h (revision 816d8b50)
1 /*
2  * Copyright (C) 2013-2016 Synopsys, Inc. All rights reserved.
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  */
6 
7 #ifndef _CONFIG_AXS10X_H_
8 #define _CONFIG_AXS10X_H_
9 
10 #include <linux/sizes.h>
11 /*
12  *  CPU configuration
13  */
14 #define CONFIG_SYS_TIMER_RATE		CONFIG_SYS_CLK_FREQ
15 
16 #define ARC_FPGA_PERIPHERAL_BASE	0xE0000000
17 #define ARC_APB_PERIPHERAL_BASE		0xF0000000
18 #define ARC_DWMMC_BASE			(ARC_FPGA_PERIPHERAL_BASE + 0x15000)
19 #define ARC_DWGMAC_BASE			(ARC_FPGA_PERIPHERAL_BASE + 0x18000)
20 
21 /*
22  * Memory configuration
23  */
24 #define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_TEXT_BASE
25 
26 #define CONFIG_SYS_DDR_SDRAM_BASE	0x80000000
27 #define CONFIG_SYS_SDRAM_BASE		CONFIG_SYS_DDR_SDRAM_BASE
28 #define CONFIG_SYS_SDRAM_SIZE		SZ_512M
29 
30 #define CONFIG_SYS_INIT_SP_ADDR		\
31 	(CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
32 
33 #define CONFIG_SYS_MALLOC_LEN		SZ_2M
34 #define CONFIG_SYS_BOOTM_LEN		SZ_32M
35 #define CONFIG_SYS_LOAD_ADDR		0x82000000
36 
37 /*
38  * This board might be of different versions so handle it
39  */
40 #define CONFIG_BOARD_TYPES
41 #define CONFIG_BOARD_EARLY_INIT_F
42 
43 /*
44  * NAND Flash configuration
45  */
46 #define CONFIG_SYS_NO_FLASH
47 #define CONFIG_SYS_NAND_BASE		(ARC_FPGA_PERIPHERAL_BASE + 0x16000)
48 #define CONFIG_SYS_MAX_NAND_DEVICE	1
49 
50 /*
51  * UART configuration
52  */
53 #define CONFIG_DW_SERIAL
54 #define CONFIG_SYS_NS16550_SERIAL
55 #define CONFIG_SYS_NS16550_CLK		33333333
56 #define CONFIG_SYS_NS16550_MEM32
57 #define CONFIG_BAUDRATE			115200
58 
59 /*
60  * I2C configuration
61  */
62 #define CONFIG_SYS_I2C
63 #define CONFIG_I2C_ENV_EEPROM_BUS	2
64 #define CONFIG_SYS_I2C_SPEED		100000
65 #define CONFIG_SYS_I2C_SPEED1		100000
66 #define CONFIG_SYS_I2C_SPEED2		100000
67 #define CONFIG_SYS_I2C_SLAVE		0
68 #define CONFIG_SYS_I2C_SLAVE1		0
69 #define CONFIG_SYS_I2C_SLAVE2		0
70 #define CONFIG_SYS_I2C_BASE		0xE001D000
71 #define CONFIG_SYS_I2C_BASE1		0xE001E000
72 #define CONFIG_SYS_I2C_BASE2		0xE001F000
73 #define CONFIG_SYS_I2C_BUS_MAX		3
74 #define IC_CLK				50
75 
76 /*
77  * EEPROM configuration
78  */
79 #define CONFIG_SYS_I2C_EEPROM_ADDR		(0xA8 >> 1)
80 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		1
81 #define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW	1
82 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	3
83 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	64
84 
85 /*
86  * SD/MMC configuration
87  */
88 #define CONFIG_GENERIC_MMC
89 #define CONFIG_DWMMC
90 #define CONFIG_DOS_PARTITION
91 
92 /*
93  * Ethernet PHY configuration
94  */
95 #define CONFIG_MII
96 #define CONFIG_PHY_GIGE
97 
98 /*
99  * USB 1.1 configuration
100  */
101 #define CONFIG_USB_OHCI_NEW
102 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
103 
104 /*
105  * Commands still not supported in Kconfig
106  */
107 #define CONFIG_CMD_NAND
108 
109 #define CONFIG_AUTO_COMPLETE
110 #define CONFIG_SYS_MAXARGS		16
111 
112 /*
113  * Environment settings
114  */
115 #define CONFIG_ENV_IS_IN_EEPROM
116 #define CONFIG_ENV_SIZE			SZ_512
117 #define CONFIG_ENV_OFFSET		0
118 
119 /*
120  * Environment configuration
121  */
122 #define CONFIG_BOOTFILE			"uImage"
123 #define CONFIG_BOOTARGS			"console=ttyS3,115200n8"
124 #define CONFIG_LOADADDR			CONFIG_SYS_LOAD_ADDR
125 
126 /*
127  * Console configuration
128  */
129 #define CONFIG_SYS_LONGHELP
130 #define CONFIG_SYS_CBSIZE		SZ_256
131 #define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
132 #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
133 						sizeof(CONFIG_SYS_PROMPT) + 16)
134 
135 /*
136  * Misc utility configuration
137  */
138 #define CONFIG_BOUNCE_BUFFER
139 
140 #endif /* _CONFIG_AXS10X_H_ */
141