1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright (C) 2017 Andes Technology Corporation 4 * Rick Chen, Andes Technology Corporation <rick@andestech.com> 5 */ 6 7 #ifndef __CONFIG_H 8 #define __CONFIG_H 9 10 /* 11 * CPU and Board Configuration Options 12 */ 13 #define CONFIG_BOOTP_SEND_HOSTNAME 14 15 /* 16 * Miscellaneous configurable options 17 */ 18 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 19 20 /* 21 * Print Buffer Size 22 */ 23 #define CONFIG_SYS_PBSIZE \ 24 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 25 26 /* 27 * max number of command args 28 */ 29 #define CONFIG_SYS_MAXARGS 16 30 31 /* 32 * Boot Argument Buffer Size 33 */ 34 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 35 36 /* 37 * Size of malloc() pool 38 * 512kB is suggested, (CONFIG_ENV_SIZE + 128 * 1024) was not enough 39 */ 40 #define CONFIG_SYS_MALLOC_LEN (512 << 10) 41 42 /* DT blob (fdt) address */ 43 #define CONFIG_SYS_FDT_BASE 0x000f0000 44 45 /* 46 * Physical Memory Map 47 */ 48 #define CONFIG_NR_DRAM_BANKS 2 49 #define PHYS_SDRAM_0 0x00000000 /* SDRAM Bank #1 */ 50 #define PHYS_SDRAM_1 \ 51 (PHYS_SDRAM_0 + PHYS_SDRAM_0_SIZE) /* SDRAM Bank #2 */ 52 #define PHYS_SDRAM_0_SIZE 0x20000000 /* 512 MB */ 53 #define PHYS_SDRAM_1_SIZE 0x20000000 /* 512 MB */ 54 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_0 55 56 /* 57 * Serial console configuration 58 */ 59 #define CONFIG_SYS_NS16550_SERIAL 60 #ifndef CONFIG_DM_SERIAL 61 #define CONFIG_SYS_NS16550_REG_SIZE -4 62 #endif 63 #define CONFIG_SYS_NS16550_CLK 19660800 64 65 /* Init Stack Pointer */ 66 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000000 - \ 67 GENERATED_GBL_DATA_SIZE) 68 69 /* 70 * Load address and memory test area should agree with 71 * arch/riscv/config.mk. Be careful not to overwrite U-Boot itself. 72 */ 73 #define CONFIG_SYS_LOAD_ADDR 0x100000 /* SDRAM */ 74 75 /* 76 * memtest works on 512 MB in DRAM 77 */ 78 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_0 79 #define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_0 + PHYS_SDRAM_0_SIZE) 80 81 /* 82 * FLASH and environment organization 83 */ 84 85 /* use CFI framework */ 86 #define CONFIG_SYS_FLASH_CFI 87 #define CONFIG_FLASH_CFI_DRIVER 88 89 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT 90 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 91 #define CONFIG_SYS_CFI_FLASH_STATUS_POLL 92 93 /* support JEDEC */ 94 #ifdef CONFIG_CFI_FLASH 95 #define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1 96 #endif/* Do not use CONFIG_FLASH_CFI_LEGACY to detect on board flash */ 97 #define PHYS_FLASH_1 0x88000000 /* BANK 0 */ 98 #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 99 #define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1, } 100 #define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1 101 102 #define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* TO for Flash Erase (ms) */ 103 #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* TO for Flash Write (ms) */ 104 105 /* max number of memory banks */ 106 /* 107 * There are 4 banks supported for this Controller, 108 * but we have only 1 bank connected to flash on board 109 */ 110 #ifndef CONFIG_SYS_MAX_FLASH_BANKS_DETECT 111 #define CONFIG_SYS_MAX_FLASH_BANKS 1 112 #endif 113 #define CONFIG_SYS_FLASH_BANKS_SIZES {0x4000000} 114 115 /* max number of sectors on one chip */ 116 #define CONFIG_FLASH_SECTOR_SIZE (0x10000*2) 117 #define CONFIG_SYS_MAX_FLASH_SECT 512 118 119 /* environments */ 120 #define CONFIG_ENV_SPI_BUS 0 121 #define CONFIG_ENV_SPI_CS 0 122 #define CONFIG_ENV_SPI_MAX_HZ 50000000 123 #define CONFIG_ENV_SPI_MODE 0 124 #define CONFIG_ENV_SECT_SIZE 0x1000 125 #define CONFIG_ENV_OVERWRITE 126 127 /* SPI FLASH */ 128 #define CONFIG_SF_DEFAULT_BUS 0 129 #define CONFIG_SF_DEFAULT_CS 0 130 #define CONFIG_SF_DEFAULT_SPEED 1000000 131 #define CONFIG_SF_DEFAULT_MODE 0 132 133 /* 134 * For booting Linux, the board info and command line data 135 * have to be in the first 16 MB of memory, since this is 136 * the maximum mapped by the Linux kernel during initialization. 137 */ 138 139 /* Initial Memory map for Linux*/ 140 #define CONFIG_SYS_BOOTMAPSZ (64 << 20) 141 /* Increase max gunzip size */ 142 #define CONFIG_SYS_BOOTM_LEN (64 << 20) 143 144 /* When we use RAM as ENV */ 145 #define CONFIG_ENV_SIZE 0x2000 146 147 /* Enable distro boot */ 148 #define BOOT_TARGET_DEVICES(func) \ 149 func(MMC, mmc, 0) \ 150 func(DHCP, dhcp, na) 151 #include <config_distro_bootcmd.h> 152 153 #define CONFIG_EXTRA_ENV_SETTINGS \ 154 "kernel_addr_r=0x00080000\0" \ 155 "pxefile_addr_r=0x01f00000\0" \ 156 "scriptaddr=0x01f00000\0" \ 157 "fdt_addr_r=0x02000000\0" \ 158 "ramdisk_addr_r=0x02800000\0" \ 159 BOOTENV 160 161 #endif /* __CONFIG_H */ 162