1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright (C) 2017 Andes Technology Corporation 4 * Rick Chen, Andes Technology Corporation <rick@andestech.com> 5 */ 6 7 #ifndef __CONFIG_H 8 #define __CONFIG_H 9 10 /* 11 * CPU and Board Configuration Options 12 */ 13 #define CONFIG_BOOTP_SEND_HOSTNAME 14 #define CONFIG_BOOTP_SERVERIP 15 16 /* 17 * Miscellaneous configurable options 18 */ 19 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 20 21 /* 22 * Print Buffer Size 23 */ 24 #define CONFIG_SYS_PBSIZE \ 25 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 26 27 /* 28 * max number of command args 29 */ 30 #define CONFIG_SYS_MAXARGS 16 31 32 /* 33 * Boot Argument Buffer Size 34 */ 35 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 36 37 /* 38 * Size of malloc() pool 39 * 512kB is suggested, (CONFIG_ENV_SIZE + 128 * 1024) was not enough 40 */ 41 #define CONFIG_SYS_MALLOC_LEN (512 << 10) 42 43 /* DT blob (fdt) address */ 44 #define CONFIG_SYS_FDT_BASE 0x000f0000 45 46 /* 47 * Physical Memory Map 48 */ 49 #define CONFIG_NR_DRAM_BANKS 2 50 #define PHYS_SDRAM_0 0x00000000 /* SDRAM Bank #1 */ 51 #define PHYS_SDRAM_1 \ 52 (PHYS_SDRAM_0 + PHYS_SDRAM_0_SIZE) /* SDRAM Bank #2 */ 53 #define PHYS_SDRAM_0_SIZE 0x20000000 /* 512 MB */ 54 #define PHYS_SDRAM_1_SIZE 0x20000000 /* 512 MB */ 55 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_0 56 57 /* 58 * Serial console configuration 59 */ 60 #define CONFIG_SYS_NS16550_SERIAL 61 #ifndef CONFIG_DM_SERIAL 62 #define CONFIG_SYS_NS16550_REG_SIZE -4 63 #endif 64 #define CONFIG_SYS_NS16550_CLK 19660800 65 66 /* Init Stack Pointer */ 67 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000000 - \ 68 GENERATED_GBL_DATA_SIZE) 69 70 /* 71 * Load address and memory test area should agree with 72 * arch/riscv/config.mk. Be careful not to overwrite U-Boot itself. 73 */ 74 #define CONFIG_SYS_LOAD_ADDR 0x100000 /* SDRAM */ 75 76 /* 77 * memtest works on 512 MB in DRAM 78 */ 79 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_0 80 #define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_0 + PHYS_SDRAM_0_SIZE) 81 82 /* 83 * FLASH and environment organization 84 */ 85 86 /* use CFI framework */ 87 #define CONFIG_SYS_FLASH_CFI 88 #define CONFIG_FLASH_CFI_DRIVER 89 90 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT 91 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 92 #define CONFIG_SYS_CFI_FLASH_STATUS_POLL 93 94 /* support JEDEC */ 95 #ifdef CONFIG_CFI_FLASH 96 #define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1 97 #endif/* Do not use CONFIG_FLASH_CFI_LEGACY to detect on board flash */ 98 #define PHYS_FLASH_1 0x88000000 /* BANK 0 */ 99 #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 100 #define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1, } 101 #define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1 102 103 #define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* TO for Flash Erase (ms) */ 104 #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* TO for Flash Write (ms) */ 105 106 /* max number of memory banks */ 107 /* 108 * There are 4 banks supported for this Controller, 109 * but we have only 1 bank connected to flash on board 110 */ 111 #ifndef CONFIG_SYS_MAX_FLASH_BANKS_DETECT 112 #define CONFIG_SYS_MAX_FLASH_BANKS 1 113 #endif 114 #define CONFIG_SYS_FLASH_BANKS_SIZES {0x4000000} 115 116 /* max number of sectors on one chip */ 117 #define CONFIG_FLASH_SECTOR_SIZE (0x10000*2) 118 #define CONFIG_SYS_MAX_FLASH_SECT 512 119 120 /* environments */ 121 #define CONFIG_ENV_SPI_BUS 0 122 #define CONFIG_ENV_SPI_CS 0 123 #define CONFIG_ENV_SPI_MAX_HZ 50000000 124 #define CONFIG_ENV_SPI_MODE 0 125 #define CONFIG_ENV_SECT_SIZE 0x1000 126 #define CONFIG_ENV_OVERWRITE 127 128 /* SPI FLASH */ 129 #define CONFIG_SF_DEFAULT_BUS 0 130 #define CONFIG_SF_DEFAULT_CS 0 131 #define CONFIG_SF_DEFAULT_SPEED 1000000 132 #define CONFIG_SF_DEFAULT_MODE 0 133 134 /* 135 * For booting Linux, the board info and command line data 136 * have to be in the first 16 MB of memory, since this is 137 * the maximum mapped by the Linux kernel during initialization. 138 */ 139 140 /* Initial Memory map for Linux*/ 141 #define CONFIG_SYS_BOOTMAPSZ (64 << 20) 142 /* Increase max gunzip size */ 143 #define CONFIG_SYS_BOOTM_LEN (64 << 20) 144 145 /* When we use RAM as ENV */ 146 #define CONFIG_ENV_SIZE 0x2000 147 148 /* Enable distro boot */ 149 #define BOOT_TARGET_DEVICES(func) \ 150 func(MMC, mmc, 0) \ 151 func(DHCP, dhcp, na) 152 #include <config_distro_bootcmd.h> 153 154 #define CONFIG_EXTRA_ENV_SETTINGS \ 155 "kernel_addr_r=0x00080000\0" \ 156 "pxefile_addr_r=0x01f00000\0" \ 157 "scriptaddr=0x01f00000\0" \ 158 "fdt_addr_r=0x02000000\0" \ 159 "ramdisk_addr_r=0x02800000\0" \ 160 BOOTENV 161 162 #endif /* __CONFIG_H */ 163