1 /* 2 * Copyright (C) 2012 Atmel Corporation 3 * 4 * Configuation settings for the AT91SAM9X5EK board. 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __CONFIG_H__ 10 #define __CONFIG_H__ 11 12 #include <asm/hardware.h> 13 14 #define CONFIG_SYS_TEXT_BASE 0x26f00000 15 16 /* ARM asynchronous clock */ 17 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 18 #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */ 19 20 #define CONFIG_AT91SAM9X5EK 21 22 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 23 #define CONFIG_SETUP_MEMORY_TAGS 24 #define CONFIG_INITRD_TAG 25 #define CONFIG_SKIP_LOWLEVEL_INIT 26 27 /* general purpose I/O */ 28 #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ 29 30 /* LCD */ 31 #define LCD_BPP LCD_COLOR16 32 #define LCD_OUTPUT_BPP 24 33 #define CONFIG_LCD_LOGO 34 #define CONFIG_LCD_INFO 35 #define CONFIG_LCD_INFO_BELOW_LOGO 36 #define CONFIG_ATMEL_HLCD 37 #define CONFIG_ATMEL_LCD_RGB565 38 39 40 /* 41 * BOOTP options 42 */ 43 #define CONFIG_BOOTP_BOOTFILESIZE 44 #define CONFIG_BOOTP_BOOTPATH 45 #define CONFIG_BOOTP_GATEWAY 46 #define CONFIG_BOOTP_HOSTNAME 47 48 /* 49 * define CONFIG_USB_EHCI_HCD to enable USB Hi-Speed (aka 2.0) 50 * NB: in this case, USB 1.1 devices won't be recognized. 51 */ 52 53 /* SDRAM */ 54 #define CONFIG_NR_DRAM_BANKS 1 55 #define CONFIG_SYS_SDRAM_BASE 0x20000000 56 #define CONFIG_SYS_SDRAM_SIZE 0x08000000 /* 128 megs */ 57 58 #define CONFIG_SYS_INIT_SP_ADDR \ 59 (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE) 60 61 /* DataFlash */ 62 #ifdef CONFIG_CMD_SF 63 #define CONFIG_SF_DEFAULT_SPEED 30000000 64 #endif 65 66 /* NAND flash */ 67 #ifdef CONFIG_CMD_NAND 68 #define CONFIG_NAND_ATMEL 69 #define CONFIG_SYS_MAX_NAND_DEVICE 1 70 #define CONFIG_SYS_NAND_BASE 0x40000000 71 #define CONFIG_SYS_NAND_DBW_8 1 72 /* our ALE is AD21 */ 73 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) 74 /* our CLE is AD22 */ 75 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) 76 #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD4 77 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5 78 79 #define CONFIG_MTD_DEVICE 80 #define CONFIG_MTD_PARTITIONS 81 #endif 82 83 /* PMECC & PMERRLOC */ 84 #define CONFIG_ATMEL_NAND_HWECC 1 85 #define CONFIG_ATMEL_NAND_HW_PMECC 1 86 #define CONFIG_PMECC_CAP 2 87 #define CONFIG_PMECC_SECTOR_SIZE 512 88 89 /* USB */ 90 #ifdef CONFIG_CMD_USB 91 #ifndef CONFIG_USB_EHCI_HCD 92 #define CONFIG_USB_ATMEL 93 #define CONFIG_USB_ATMEL_CLK_SEL_UPLL 94 #define CONFIG_USB_OHCI_NEW 95 #define CONFIG_SYS_USB_OHCI_CPU_INIT 96 #define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI 97 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9x5" 98 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 3 99 #endif 100 #endif 101 102 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ 103 104 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 105 #define CONFIG_SYS_MEMTEST_END 0x26e00000 106 107 #ifdef CONFIG_SYS_USE_NANDFLASH 108 /* bootstrap + u-boot + env + linux in nandflash */ 109 #define CONFIG_ENV_OFFSET 0x120000 110 #define CONFIG_ENV_OFFSET_REDUND 0x100000 111 #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ 112 #define CONFIG_BOOTCOMMAND "nand read " \ 113 "0x22000000 0x200000 0x300000; " \ 114 "bootm 0x22000000" 115 #elif defined(CONFIG_SYS_USE_SPIFLASH) 116 /* bootstrap + u-boot + env + linux in spi flash */ 117 #define CONFIG_ENV_OFFSET 0x5000 118 #define CONFIG_ENV_SIZE 0x3000 119 #define CONFIG_ENV_SECT_SIZE 0x1000 120 #define CONFIG_ENV_SPI_MAX_HZ 30000000 121 #define CONFIG_BOOTCOMMAND "sf probe 0; " \ 122 "sf read 0x22000000 0x100000 0x300000; " \ 123 "bootm 0x22000000" 124 #elif defined(CONFIG_SYS_USE_DATAFLASH) 125 /* bootstrap + u-boot + env + linux in data flash */ 126 #define CONFIG_ENV_OFFSET 0x4200 127 #define CONFIG_ENV_SIZE 0x4200 128 #define CONFIG_ENV_SECT_SIZE 0x210 129 #define CONFIG_ENV_SPI_MAX_HZ 30000000 130 #define CONFIG_BOOTCOMMAND "sf probe 0; " \ 131 "sf read 0x22000000 0x84000 0x294000; " \ 132 "bootm 0x22000000" 133 #else /* CONFIG_SYS_USE_MMC */ 134 /* bootstrap + u-boot + env + linux in mmc */ 135 #define CONFIG_ENV_SIZE 0x4000 136 #endif 137 138 #define CONFIG_SYS_LONGHELP 139 #define CONFIG_CMDLINE_EDITING 140 #define CONFIG_AUTO_COMPLETE 141 142 /* 143 * Size of malloc() pool 144 */ 145 #define CONFIG_SYS_MALLOC_LEN (512 * 1024 + 0x1000) 146 147 /* SPL */ 148 #define CONFIG_SPL_FRAMEWORK 149 #define CONFIG_SPL_TEXT_BASE 0x300000 150 #define CONFIG_SPL_MAX_SIZE 0x6000 151 #define CONFIG_SPL_STACK 0x308000 152 153 #define CONFIG_SPL_BSS_START_ADDR 0x20000000 154 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 155 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 156 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 157 158 #define CONFIG_SYS_MONITOR_LEN (512 << 10) 159 160 #define CONFIG_SYS_MASTER_CLOCK 132096000 161 #define CONFIG_SYS_AT91_PLLA 0x20c73f03 162 #define CONFIG_SYS_MCKR 0x1301 163 #define CONFIG_SYS_MCKR_CSS 0x1302 164 165 #ifdef CONFIG_SYS_USE_MMC 166 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 167 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 168 169 #elif CONFIG_SYS_USE_NANDFLASH 170 #define CONFIG_SPL_NAND_DRIVERS 171 #define CONFIG_SPL_NAND_BASE 172 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000 173 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 174 #define CONFIG_SYS_NAND_PAGE_SIZE 0x800 175 #define CONFIG_SYS_NAND_PAGE_COUNT 64 176 #define CONFIG_SYS_NAND_OOBSIZE 64 177 #define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000 178 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 179 #define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER 180 181 #elif CONFIG_SYS_USE_SPIFLASH 182 #define CONFIG_SPL_SPI_LOAD 183 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8400 184 185 #endif 186 187 #endif 188