1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright (C) 2012 Atmel Corporation 4 * 5 * Configuation settings for the AT91SAM9X5EK board. 6 */ 7 8 #ifndef __CONFIG_H__ 9 #define __CONFIG_H__ 10 11 /* ARM asynchronous clock */ 12 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 13 #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */ 14 15 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 16 #define CONFIG_SETUP_MEMORY_TAGS 17 #define CONFIG_INITRD_TAG 18 #define CONFIG_SKIP_LOWLEVEL_INIT 19 20 /* general purpose I/O */ 21 #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ 22 23 /* 24 * BOOTP options 25 */ 26 #define CONFIG_BOOTP_BOOTFILESIZE 27 28 /* 29 * define CONFIG_USB_EHCI_HCD to enable USB Hi-Speed (aka 2.0) 30 * NB: in this case, USB 1.1 devices won't be recognized. 31 */ 32 33 /* SDRAM */ 34 #define CONFIG_NR_DRAM_BANKS 1 35 #define CONFIG_SYS_SDRAM_BASE 0x20000000 36 #define CONFIG_SYS_SDRAM_SIZE 0x08000000 /* 128 megs */ 37 38 #define CONFIG_SYS_INIT_SP_ADDR \ 39 (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE) 40 41 /* DataFlash */ 42 #ifdef CONFIG_CMD_SF 43 #define CONFIG_SF_DEFAULT_SPEED 30000000 44 #endif 45 46 /* NAND flash */ 47 #ifdef CONFIG_CMD_NAND 48 #define CONFIG_SYS_MAX_NAND_DEVICE 1 49 #define CONFIG_SYS_NAND_BASE 0x40000000 50 #define CONFIG_SYS_NAND_DBW_8 1 51 /* our ALE is AD21 */ 52 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) 53 /* our CLE is AD22 */ 54 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) 55 #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD4 56 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5 57 #endif 58 59 /* PMECC & PMERRLOC */ 60 #define CONFIG_ATMEL_NAND_HWECC 1 61 #define CONFIG_ATMEL_NAND_HW_PMECC 1 62 #define CONFIG_PMECC_CAP 2 63 #define CONFIG_PMECC_SECTOR_SIZE 512 64 65 /* USB */ 66 #ifdef CONFIG_CMD_USB 67 #ifndef CONFIG_USB_EHCI_HCD 68 #define CONFIG_USB_ATMEL 69 #define CONFIG_USB_ATMEL_CLK_SEL_UPLL 70 #define CONFIG_USB_OHCI_NEW 71 #define CONFIG_SYS_USB_OHCI_CPU_INIT 72 #define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI 73 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9x5" 74 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 3 75 #endif 76 #endif 77 78 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ 79 80 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 81 #define CONFIG_SYS_MEMTEST_END 0x26e00000 82 83 #ifdef CONFIG_NAND_BOOT 84 /* bootstrap + u-boot + env + linux in nandflash */ 85 #define CONFIG_ENV_OFFSET 0x140000 86 #define CONFIG_ENV_OFFSET_REDUND 0x100000 87 #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ 88 #define CONFIG_BOOTCOMMAND "nand read " \ 89 "0x22000000 0x200000 0x300000; " \ 90 "bootm 0x22000000" 91 #elif defined(CONFIG_SPI_BOOT) 92 /* bootstrap + u-boot + env + linux in spi flash */ 93 #define CONFIG_ENV_OFFSET 0x5000 94 #define CONFIG_ENV_SIZE 0x3000 95 #define CONFIG_ENV_SECT_SIZE 0x1000 96 #define CONFIG_ENV_SPI_MAX_HZ 30000000 97 #define CONFIG_BOOTCOMMAND "sf probe 0; " \ 98 "sf read 0x22000000 0x100000 0x300000; " \ 99 "bootm 0x22000000" 100 #elif defined(CONFIG_SYS_USE_DATAFLASH) 101 /* bootstrap + u-boot + env + linux in data flash */ 102 #define CONFIG_ENV_OFFSET 0x4200 103 #define CONFIG_ENV_SIZE 0x4200 104 #define CONFIG_ENV_SECT_SIZE 0x210 105 #define CONFIG_ENV_SPI_MAX_HZ 30000000 106 #define CONFIG_BOOTCOMMAND "sf probe 0; " \ 107 "sf read 0x22000000 0x84000 0x294000; " \ 108 "bootm 0x22000000" 109 #else /* CONFIG_SD_BOOT */ 110 /* bootstrap + u-boot + env + linux in mmc */ 111 #define CONFIG_ENV_SIZE 0x4000 112 #endif 113 114 /* 115 * Size of malloc() pool 116 */ 117 #define CONFIG_SYS_MALLOC_LEN (512 * 1024 + 0x1000) 118 119 /* SPL */ 120 #define CONFIG_SPL_TEXT_BASE 0x300000 121 #define CONFIG_SPL_MAX_SIZE 0x6000 122 #define CONFIG_SPL_STACK 0x308000 123 124 #define CONFIG_SPL_BSS_START_ADDR 0x20000000 125 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 126 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 127 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 128 129 #define CONFIG_SYS_MONITOR_LEN (512 << 10) 130 131 #define CONFIG_SYS_MASTER_CLOCK 132096000 132 #define CONFIG_SYS_AT91_PLLA 0x20c73f03 133 #define CONFIG_SYS_MCKR 0x1301 134 #define CONFIG_SYS_MCKR_CSS 0x1302 135 136 #ifdef CONFIG_SD_BOOT 137 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 138 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 139 140 #elif CONFIG_SPI_BOOT 141 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8400 142 143 #elif CONFIG_NAND_BOOT 144 #define CONFIG_SPL_NAND_DRIVERS 145 #define CONFIG_SPL_NAND_BASE 146 #endif 147 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000 148 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 149 #define CONFIG_SYS_NAND_PAGE_SIZE 0x800 150 #define CONFIG_SYS_NAND_PAGE_COUNT 64 151 #define CONFIG_SYS_NAND_OOBSIZE 64 152 #define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000 153 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 154 #define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER 155 156 #endif 157