1 /*
2  * Copyright (C) 2012 Atmel Corporation
3  *
4  * Configuation settings for the AT91SAM9X5EK board.
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 
9 #ifndef __CONFIG_H__
10 #define __CONFIG_H__
11 
12 #define CONFIG_SYS_TEXT_BASE		0x26f00000
13 
14 /* ARM asynchronous clock */
15 #define CONFIG_SYS_AT91_SLOW_CLOCK	32768
16 #define CONFIG_SYS_AT91_MAIN_CLOCK	12000000	/* 12 MHz crystal */
17 
18 #define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
19 #define CONFIG_SETUP_MEMORY_TAGS
20 #define CONFIG_INITRD_TAG
21 #define CONFIG_SKIP_LOWLEVEL_INIT
22 
23 /* general purpose I/O */
24 #define CONFIG_ATMEL_LEGACY		/* required until (g)pio is fixed */
25 
26 /*
27  * BOOTP options
28  */
29 #define CONFIG_BOOTP_BOOTFILESIZE
30 #define CONFIG_BOOTP_BOOTPATH
31 #define CONFIG_BOOTP_GATEWAY
32 #define CONFIG_BOOTP_HOSTNAME
33 
34 /*
35  * define CONFIG_USB_EHCI_HCD to enable USB Hi-Speed (aka 2.0)
36  * NB: in this case, USB 1.1 devices won't be recognized.
37  */
38 
39 /* SDRAM */
40 #define CONFIG_NR_DRAM_BANKS		1
41 #define CONFIG_SYS_SDRAM_BASE		0x20000000
42 #define CONFIG_SYS_SDRAM_SIZE		0x08000000	/* 128 megs */
43 
44 #define CONFIG_SYS_INIT_SP_ADDR \
45 	(CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
46 
47 /* DataFlash */
48 #ifdef CONFIG_CMD_SF
49 #define CONFIG_SF_DEFAULT_SPEED		30000000
50 #endif
51 
52 /* NAND flash */
53 #ifdef CONFIG_CMD_NAND
54 #define CONFIG_NAND_ATMEL
55 #define CONFIG_SYS_MAX_NAND_DEVICE	1
56 #define CONFIG_SYS_NAND_BASE		0x40000000
57 #define CONFIG_SYS_NAND_DBW_8		1
58 /* our ALE is AD21 */
59 #define CONFIG_SYS_NAND_MASK_ALE	(1 << 21)
60 /* our CLE is AD22 */
61 #define CONFIG_SYS_NAND_MASK_CLE	(1 << 22)
62 #define CONFIG_SYS_NAND_ENABLE_PIN	AT91_PIN_PD4
63 #define CONFIG_SYS_NAND_READY_PIN	AT91_PIN_PD5
64 
65 #define CONFIG_MTD_DEVICE
66 #define CONFIG_MTD_PARTITIONS
67 #endif
68 
69 /* PMECC & PMERRLOC */
70 #define CONFIG_ATMEL_NAND_HWECC		1
71 #define CONFIG_ATMEL_NAND_HW_PMECC	1
72 #define CONFIG_PMECC_CAP		2
73 #define CONFIG_PMECC_SECTOR_SIZE	512
74 
75 /* USB */
76 #ifdef CONFIG_CMD_USB
77 #ifndef CONFIG_USB_EHCI_HCD
78 #define CONFIG_USB_ATMEL
79 #define CONFIG_USB_ATMEL_CLK_SEL_UPLL
80 #define CONFIG_USB_OHCI_NEW
81 #define CONFIG_SYS_USB_OHCI_CPU_INIT
82 #define CONFIG_SYS_USB_OHCI_REGS_BASE		ATMEL_BASE_OHCI
83 #define CONFIG_SYS_USB_OHCI_SLOT_NAME		"at91sam9x5"
84 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	3
85 #endif
86 #endif
87 
88 #define CONFIG_SYS_LOAD_ADDR		0x22000000	/* load address */
89 
90 #define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
91 #define CONFIG_SYS_MEMTEST_END		0x26e00000
92 
93 #ifdef CONFIG_NAND_BOOT
94 /* bootstrap + u-boot + env + linux in nandflash */
95 #define CONFIG_ENV_OFFSET		0x120000
96 #define CONFIG_ENV_OFFSET_REDUND	0x100000
97 #define CONFIG_ENV_SIZE		0x20000		/* 1 sector = 128 kB */
98 #define CONFIG_BOOTCOMMAND	"nand read " \
99 				"0x22000000 0x200000 0x300000; " \
100 				"bootm 0x22000000"
101 #elif defined(CONFIG_SPI_BOOT)
102 /* bootstrap + u-boot + env + linux in spi flash */
103 #define CONFIG_ENV_OFFSET	0x5000
104 #define CONFIG_ENV_SIZE		0x3000
105 #define CONFIG_ENV_SECT_SIZE	0x1000
106 #define CONFIG_ENV_SPI_MAX_HZ	30000000
107 #define CONFIG_BOOTCOMMAND	"sf probe 0; " \
108 				"sf read 0x22000000 0x100000 0x300000; " \
109 				"bootm 0x22000000"
110 #elif defined(CONFIG_SYS_USE_DATAFLASH)
111 /* bootstrap + u-boot + env + linux in data flash */
112 #define CONFIG_ENV_OFFSET	0x4200
113 #define CONFIG_ENV_SIZE		0x4200
114 #define CONFIG_ENV_SECT_SIZE	0x210
115 #define CONFIG_ENV_SPI_MAX_HZ	30000000
116 #define CONFIG_BOOTCOMMAND	"sf probe 0; " \
117 				"sf read 0x22000000 0x84000 0x294000; " \
118 				"bootm 0x22000000"
119 #else /* CONFIG_SD_BOOT */
120 /* bootstrap + u-boot + env + linux in mmc */
121 #define CONFIG_ENV_SIZE		0x4000
122 #endif
123 
124 #define CONFIG_SYS_LONGHELP
125 #define CONFIG_CMDLINE_EDITING
126 #define CONFIG_AUTO_COMPLETE
127 
128 /*
129  * Size of malloc() pool
130  */
131 #define CONFIG_SYS_MALLOC_LEN		(512 * 1024 + 0x1000)
132 
133 /* SPL */
134 #define CONFIG_SPL_FRAMEWORK
135 #define CONFIG_SPL_TEXT_BASE		0x300000
136 #define CONFIG_SPL_MAX_SIZE		0x6000
137 #define CONFIG_SPL_STACK		0x308000
138 
139 #define CONFIG_SPL_BSS_START_ADDR	0x20000000
140 #define CONFIG_SPL_BSS_MAX_SIZE		0x80000
141 #define CONFIG_SYS_SPL_MALLOC_START	0x20080000
142 #define CONFIG_SYS_SPL_MALLOC_SIZE	0x80000
143 
144 #define CONFIG_SYS_MONITOR_LEN		(512 << 10)
145 
146 #define CONFIG_SYS_MASTER_CLOCK		132096000
147 #define CONFIG_SYS_AT91_PLLA		0x20c73f03
148 #define CONFIG_SYS_MCKR			0x1301
149 #define CONFIG_SYS_MCKR_CSS		0x1302
150 
151 #ifdef CONFIG_SD_BOOT
152 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	1
153 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME		"u-boot.img"
154 
155 #elif CONFIG_SPI_BOOT
156 #define CONFIG_SPL_SPI_LOAD
157 #define CONFIG_SYS_SPI_U_BOOT_OFFS	0x8400
158 
159 #elif CONFIG_NAND_BOOT
160 #define CONFIG_SPL_NAND_DRIVERS
161 #define CONFIG_SPL_NAND_BASE
162 #endif
163 #define CONFIG_SYS_NAND_U_BOOT_OFFS	0x40000
164 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
165 #define CONFIG_SYS_NAND_PAGE_SIZE	0x800
166 #define CONFIG_SYS_NAND_PAGE_COUNT	64
167 #define CONFIG_SYS_NAND_OOBSIZE		64
168 #define CONFIG_SYS_NAND_BLOCK_SIZE	0x20000
169 #define CONFIG_SYS_NAND_BAD_BLOCK_POS	0x0
170 #define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
171 
172 #endif
173