1 /*
2  * Copyright (C) 2012 Atmel Corporation
3  *
4  * Configuation settings for the AT91SAM9X5EK board.
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 
9 #ifndef __CONFIG_H__
10 #define __CONFIG_H__
11 
12 /* ARM asynchronous clock */
13 #define CONFIG_SYS_AT91_SLOW_CLOCK	32768
14 #define CONFIG_SYS_AT91_MAIN_CLOCK	12000000	/* 12 MHz crystal */
15 
16 #define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
17 #define CONFIG_SETUP_MEMORY_TAGS
18 #define CONFIG_INITRD_TAG
19 #define CONFIG_SKIP_LOWLEVEL_INIT
20 
21 /* general purpose I/O */
22 #define CONFIG_ATMEL_LEGACY		/* required until (g)pio is fixed */
23 
24 /*
25  * BOOTP options
26  */
27 #define CONFIG_BOOTP_BOOTFILESIZE
28 
29 /*
30  * define CONFIG_USB_EHCI_HCD to enable USB Hi-Speed (aka 2.0)
31  * NB: in this case, USB 1.1 devices won't be recognized.
32  */
33 
34 /* SDRAM */
35 #define CONFIG_NR_DRAM_BANKS		1
36 #define CONFIG_SYS_SDRAM_BASE		0x20000000
37 #define CONFIG_SYS_SDRAM_SIZE		0x08000000	/* 128 megs */
38 
39 #define CONFIG_SYS_INIT_SP_ADDR \
40 	(CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
41 
42 /* DataFlash */
43 #ifdef CONFIG_CMD_SF
44 #define CONFIG_SF_DEFAULT_SPEED		30000000
45 #endif
46 
47 /* NAND flash */
48 #ifdef CONFIG_CMD_NAND
49 #define CONFIG_NAND_ATMEL
50 #define CONFIG_SYS_MAX_NAND_DEVICE	1
51 #define CONFIG_SYS_NAND_BASE		0x40000000
52 #define CONFIG_SYS_NAND_DBW_8		1
53 /* our ALE is AD21 */
54 #define CONFIG_SYS_NAND_MASK_ALE	(1 << 21)
55 /* our CLE is AD22 */
56 #define CONFIG_SYS_NAND_MASK_CLE	(1 << 22)
57 #define CONFIG_SYS_NAND_ENABLE_PIN	AT91_PIN_PD4
58 #define CONFIG_SYS_NAND_READY_PIN	AT91_PIN_PD5
59 
60 #define CONFIG_MTD_DEVICE
61 #define CONFIG_MTD_PARTITIONS
62 #endif
63 
64 /* PMECC & PMERRLOC */
65 #define CONFIG_ATMEL_NAND_HWECC		1
66 #define CONFIG_ATMEL_NAND_HW_PMECC	1
67 #define CONFIG_PMECC_CAP		2
68 #define CONFIG_PMECC_SECTOR_SIZE	512
69 
70 /* USB */
71 #ifdef CONFIG_CMD_USB
72 #ifndef CONFIG_USB_EHCI_HCD
73 #define CONFIG_USB_ATMEL
74 #define CONFIG_USB_ATMEL_CLK_SEL_UPLL
75 #define CONFIG_USB_OHCI_NEW
76 #define CONFIG_SYS_USB_OHCI_CPU_INIT
77 #define CONFIG_SYS_USB_OHCI_REGS_BASE		ATMEL_BASE_OHCI
78 #define CONFIG_SYS_USB_OHCI_SLOT_NAME		"at91sam9x5"
79 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	3
80 #endif
81 #endif
82 
83 #define CONFIG_SYS_LOAD_ADDR		0x22000000	/* load address */
84 
85 #define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
86 #define CONFIG_SYS_MEMTEST_END		0x26e00000
87 
88 #ifdef CONFIG_NAND_BOOT
89 /* bootstrap + u-boot + env + linux in nandflash */
90 #define CONFIG_ENV_OFFSET		0x120000
91 #define CONFIG_ENV_OFFSET_REDUND	0x100000
92 #define CONFIG_ENV_SIZE		0x20000		/* 1 sector = 128 kB */
93 #define CONFIG_BOOTCOMMAND	"nand read " \
94 				"0x22000000 0x200000 0x300000; " \
95 				"bootm 0x22000000"
96 #elif defined(CONFIG_SPI_BOOT)
97 /* bootstrap + u-boot + env + linux in spi flash */
98 #define CONFIG_ENV_OFFSET	0x5000
99 #define CONFIG_ENV_SIZE		0x3000
100 #define CONFIG_ENV_SECT_SIZE	0x1000
101 #define CONFIG_ENV_SPI_MAX_HZ	30000000
102 #define CONFIG_BOOTCOMMAND	"sf probe 0; " \
103 				"sf read 0x22000000 0x100000 0x300000; " \
104 				"bootm 0x22000000"
105 #elif defined(CONFIG_SYS_USE_DATAFLASH)
106 /* bootstrap + u-boot + env + linux in data flash */
107 #define CONFIG_ENV_OFFSET	0x4200
108 #define CONFIG_ENV_SIZE		0x4200
109 #define CONFIG_ENV_SECT_SIZE	0x210
110 #define CONFIG_ENV_SPI_MAX_HZ	30000000
111 #define CONFIG_BOOTCOMMAND	"sf probe 0; " \
112 				"sf read 0x22000000 0x84000 0x294000; " \
113 				"bootm 0x22000000"
114 #else /* CONFIG_SD_BOOT */
115 /* bootstrap + u-boot + env + linux in mmc */
116 #define CONFIG_ENV_SIZE		0x4000
117 #endif
118 
119 /*
120  * Size of malloc() pool
121  */
122 #define CONFIG_SYS_MALLOC_LEN		(512 * 1024 + 0x1000)
123 
124 /* SPL */
125 #define CONFIG_SPL_TEXT_BASE		0x300000
126 #define CONFIG_SPL_MAX_SIZE		0x6000
127 #define CONFIG_SPL_STACK		0x308000
128 
129 #define CONFIG_SPL_BSS_START_ADDR	0x20000000
130 #define CONFIG_SPL_BSS_MAX_SIZE		0x80000
131 #define CONFIG_SYS_SPL_MALLOC_START	0x20080000
132 #define CONFIG_SYS_SPL_MALLOC_SIZE	0x80000
133 
134 #define CONFIG_SYS_MONITOR_LEN		(512 << 10)
135 
136 #define CONFIG_SYS_MASTER_CLOCK		132096000
137 #define CONFIG_SYS_AT91_PLLA		0x20c73f03
138 #define CONFIG_SYS_MCKR			0x1301
139 #define CONFIG_SYS_MCKR_CSS		0x1302
140 
141 #ifdef CONFIG_SD_BOOT
142 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	1
143 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME		"u-boot.img"
144 
145 #elif CONFIG_SPI_BOOT
146 #define CONFIG_SYS_SPI_U_BOOT_OFFS	0x8400
147 
148 #elif CONFIG_NAND_BOOT
149 #define CONFIG_SPL_NAND_DRIVERS
150 #define CONFIG_SPL_NAND_BASE
151 #endif
152 #define CONFIG_SYS_NAND_U_BOOT_OFFS	0x40000
153 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
154 #define CONFIG_SYS_NAND_PAGE_SIZE	0x800
155 #define CONFIG_SYS_NAND_PAGE_COUNT	64
156 #define CONFIG_SYS_NAND_OOBSIZE		64
157 #define CONFIG_SYS_NAND_BLOCK_SIZE	0x20000
158 #define CONFIG_SYS_NAND_BAD_BLOCK_POS	0x0
159 #define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
160 
161 #endif
162