1 /* 2 * Copyright (C) 2012 Atmel Corporation 3 * 4 * Configuation settings for the AT91SAM9X5EK board. 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __CONFIG_H__ 10 #define __CONFIG_H__ 11 12 /* ARM asynchronous clock */ 13 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 14 #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */ 15 16 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 17 #define CONFIG_SETUP_MEMORY_TAGS 18 #define CONFIG_INITRD_TAG 19 #define CONFIG_SKIP_LOWLEVEL_INIT 20 21 /* general purpose I/O */ 22 #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ 23 24 /* 25 * BOOTP options 26 */ 27 #define CONFIG_BOOTP_BOOTFILESIZE 28 #define CONFIG_BOOTP_BOOTPATH 29 #define CONFIG_BOOTP_GATEWAY 30 #define CONFIG_BOOTP_HOSTNAME 31 32 /* 33 * define CONFIG_USB_EHCI_HCD to enable USB Hi-Speed (aka 2.0) 34 * NB: in this case, USB 1.1 devices won't be recognized. 35 */ 36 37 /* SDRAM */ 38 #define CONFIG_NR_DRAM_BANKS 1 39 #define CONFIG_SYS_SDRAM_BASE 0x20000000 40 #define CONFIG_SYS_SDRAM_SIZE 0x08000000 /* 128 megs */ 41 42 #define CONFIG_SYS_INIT_SP_ADDR \ 43 (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE) 44 45 /* DataFlash */ 46 #ifdef CONFIG_CMD_SF 47 #define CONFIG_SF_DEFAULT_SPEED 30000000 48 #endif 49 50 /* NAND flash */ 51 #ifdef CONFIG_CMD_NAND 52 #define CONFIG_NAND_ATMEL 53 #define CONFIG_SYS_MAX_NAND_DEVICE 1 54 #define CONFIG_SYS_NAND_BASE 0x40000000 55 #define CONFIG_SYS_NAND_DBW_8 1 56 /* our ALE is AD21 */ 57 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) 58 /* our CLE is AD22 */ 59 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) 60 #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD4 61 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5 62 63 #define CONFIG_MTD_DEVICE 64 #define CONFIG_MTD_PARTITIONS 65 #endif 66 67 /* PMECC & PMERRLOC */ 68 #define CONFIG_ATMEL_NAND_HWECC 1 69 #define CONFIG_ATMEL_NAND_HW_PMECC 1 70 #define CONFIG_PMECC_CAP 2 71 #define CONFIG_PMECC_SECTOR_SIZE 512 72 73 /* USB */ 74 #ifdef CONFIG_CMD_USB 75 #ifndef CONFIG_USB_EHCI_HCD 76 #define CONFIG_USB_ATMEL 77 #define CONFIG_USB_ATMEL_CLK_SEL_UPLL 78 #define CONFIG_USB_OHCI_NEW 79 #define CONFIG_SYS_USB_OHCI_CPU_INIT 80 #define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI 81 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9x5" 82 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 3 83 #endif 84 #endif 85 86 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ 87 88 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 89 #define CONFIG_SYS_MEMTEST_END 0x26e00000 90 91 #ifdef CONFIG_NAND_BOOT 92 /* bootstrap + u-boot + env + linux in nandflash */ 93 #define CONFIG_ENV_OFFSET 0x120000 94 #define CONFIG_ENV_OFFSET_REDUND 0x100000 95 #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ 96 #define CONFIG_BOOTCOMMAND "nand read " \ 97 "0x22000000 0x200000 0x300000; " \ 98 "bootm 0x22000000" 99 #elif defined(CONFIG_SPI_BOOT) 100 /* bootstrap + u-boot + env + linux in spi flash */ 101 #define CONFIG_ENV_OFFSET 0x5000 102 #define CONFIG_ENV_SIZE 0x3000 103 #define CONFIG_ENV_SECT_SIZE 0x1000 104 #define CONFIG_ENV_SPI_MAX_HZ 30000000 105 #define CONFIG_BOOTCOMMAND "sf probe 0; " \ 106 "sf read 0x22000000 0x100000 0x300000; " \ 107 "bootm 0x22000000" 108 #elif defined(CONFIG_SYS_USE_DATAFLASH) 109 /* bootstrap + u-boot + env + linux in data flash */ 110 #define CONFIG_ENV_OFFSET 0x4200 111 #define CONFIG_ENV_SIZE 0x4200 112 #define CONFIG_ENV_SECT_SIZE 0x210 113 #define CONFIG_ENV_SPI_MAX_HZ 30000000 114 #define CONFIG_BOOTCOMMAND "sf probe 0; " \ 115 "sf read 0x22000000 0x84000 0x294000; " \ 116 "bootm 0x22000000" 117 #else /* CONFIG_SD_BOOT */ 118 /* bootstrap + u-boot + env + linux in mmc */ 119 #define CONFIG_ENV_SIZE 0x4000 120 #endif 121 122 #define CONFIG_SYS_LONGHELP 123 #define CONFIG_CMDLINE_EDITING 124 #define CONFIG_AUTO_COMPLETE 125 126 /* 127 * Size of malloc() pool 128 */ 129 #define CONFIG_SYS_MALLOC_LEN (512 * 1024 + 0x1000) 130 131 /* SPL */ 132 #define CONFIG_SPL_TEXT_BASE 0x300000 133 #define CONFIG_SPL_MAX_SIZE 0x6000 134 #define CONFIG_SPL_STACK 0x308000 135 136 #define CONFIG_SPL_BSS_START_ADDR 0x20000000 137 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 138 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 139 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 140 141 #define CONFIG_SYS_MONITOR_LEN (512 << 10) 142 143 #define CONFIG_SYS_MASTER_CLOCK 132096000 144 #define CONFIG_SYS_AT91_PLLA 0x20c73f03 145 #define CONFIG_SYS_MCKR 0x1301 146 #define CONFIG_SYS_MCKR_CSS 0x1302 147 148 #ifdef CONFIG_SD_BOOT 149 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 150 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 151 152 #elif CONFIG_SPI_BOOT 153 #define CONFIG_SPL_SPI_LOAD 154 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8400 155 156 #elif CONFIG_NAND_BOOT 157 #define CONFIG_SPL_NAND_DRIVERS 158 #define CONFIG_SPL_NAND_BASE 159 #endif 160 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000 161 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 162 #define CONFIG_SYS_NAND_PAGE_SIZE 0x800 163 #define CONFIG_SYS_NAND_PAGE_COUNT 64 164 #define CONFIG_SYS_NAND_OOBSIZE 64 165 #define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000 166 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 167 #define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER 168 169 #endif 170