1 /* 2 * (C) Copyright 2007-2008 3 * Stelian Pop <stelian@popies.net> 4 * Lead Tech Design <www.leadtechdesign.com> 5 * 6 * Configuation settings for the AT91SAM9RLEK board. 7 * 8 * See file CREDITS for list of people who contributed to this 9 * project. 10 * 11 * This program is free software; you can redistribute it and/or 12 * modify it under the terms of the GNU General Public License as 13 * published by the Free Software Foundation; either version 2 of 14 * the License, or (at your option) any later version. 15 * 16 * This program is distributed in the hope that it will be useful, 17 * but WITHOUT ANY WARRANTY; without even the implied warranty of 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19 * GNU General Public License for more details. 20 * 21 * You should have received a copy of the GNU General Public License 22 * along with this program; if not, write to the Free Software 23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 24 * MA 02111-1307 USA 25 */ 26 27 #ifndef __CONFIG_H 28 #define __CONFIG_H 29 30 #include <asm/hardware.h> 31 32 #define CONFIG_SYS_TEXT_BASE 0x21F00000 33 34 /* ARM asynchronous clock */ 35 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ 36 #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* main clock xtal */ 37 #define CONFIG_SYS_HZ 1000 38 39 #define CONFIG_AT91SAM9RLEK 1 /* It's an AT91SAM9RLEK Board */ 40 41 #define CONFIG_ARCH_CPU_INIT 42 #define CONFIG_SKIP_LOWLEVEL_INIT 43 #define CONFIG_BOARD_EARLY_INIT_F 44 45 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ 46 #define CONFIG_SETUP_MEMORY_TAGS 1 47 #define CONFIG_INITRD_TAG 1 48 49 #define CONFIG_DISPLAY_CPUINFO 50 51 #define CONFIG_ATMEL_LEGACY 52 #define CONFIG_AT91_GPIO 1 53 #define CONFIG_AT91_GPIO_PULLUP 1 54 55 /* 56 * Hardware drivers 57 */ 58 59 /* serial console */ 60 #define CONFIG_ATMEL_USART 61 #define CONFIG_USART_BASE ATMEL_BASE_DBGU 62 #define CONFIG_USART_ID ATMEL_ID_SYS 63 #define CONFIG_BAUDRATE 115200 64 65 /* LCD */ 66 #define CONFIG_LCD 1 67 #define LCD_BPP LCD_COLOR8 68 #define CONFIG_LCD_LOGO 1 69 #undef LCD_TEST_PATTERN 70 #define CONFIG_LCD_INFO 1 71 #define CONFIG_LCD_INFO_BELOW_LOGO 1 72 #define CONFIG_SYS_WHITE_ON_BLACK 1 73 #define CONFIG_ATMEL_LCD 1 74 #define CONFIG_ATMEL_LCD_RGB565 1 75 /* Let board_init_f handle the framebuffer allocation */ 76 #undef CONFIG_FB_ADDR 77 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 78 79 80 /* LED */ 81 #define CONFIG_AT91_LED 82 #define CONFIG_RED_LED AT91_PIN_PD14 /* this is the power led */ 83 #define CONFIG_GREEN_LED AT91_PIN_PD15 /* this is the user1 led */ 84 #define CONFIG_YELLOW_LED AT91_PIN_PD16 /* this is the user2 led */ 85 86 #define CONFIG_BOOTDELAY 3 87 88 /* 89 * Command line configuration. 90 */ 91 #include <config_cmd_default.h> 92 #undef CONFIG_CMD_BDI 93 #undef CONFIG_CMD_FPGA 94 #undef CONFIG_CMD_IMI 95 #undef CONFIG_CMD_IMLS 96 #undef CONFIG_CMD_LOADS 97 #undef CONFIG_CMD_NET 98 #undef CONFIG_CMD_NFS 99 #undef CONFIG_CMD_SOURCE 100 #undef CONFIG_CMD_USB 101 102 #define CONFIG_CMD_NAND 1 103 104 /* SDRAM */ 105 #define CONFIG_NR_DRAM_BANKS 1 106 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 107 #define CONFIG_SYS_SDRAM_SIZE 0x04000000 108 109 #define CONFIG_SYS_INIT_SP_ADDR \ 110 (ATMEL_BASE_SRAM + 0x1000 - GENERATED_GBL_DATA_SIZE) 111 112 /* DataFlash */ 113 #define CONFIG_ATMEL_DATAFLASH_SPI 114 #define CONFIG_HAS_DATAFLASH 1 115 #define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ) 116 #define CONFIG_SYS_MAX_DATAFLASH_BANKS 1 117 #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ 118 #define AT91_SPI_CLK 15000000 119 #define DATAFLASH_TCSS (0x1a << 16) 120 #define DATAFLASH_TCHS (0x1 << 24) 121 122 /* NOR flash - not present */ 123 #define CONFIG_SYS_NO_FLASH 1 124 125 /* NAND flash */ 126 #ifdef CONFIG_CMD_NAND 127 #define CONFIG_NAND_ATMEL 128 #define CONFIG_SYS_MAX_NAND_DEVICE 1 129 #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 130 #define CONFIG_SYS_NAND_DBW_8 1 131 /* our ALE is AD21 */ 132 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) 133 /* our CLE is AD22 */ 134 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) 135 #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PB6 136 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD17 137 138 #endif 139 140 /* Ethernet - not present */ 141 142 /* USB - not supported */ 143 144 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ 145 146 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 147 #define CONFIG_SYS_MEMTEST_END 0x23e00000 148 149 #ifdef CONFIG_SYS_USE_DATAFLASH 150 151 /* bootstrap + u-boot + env + linux in dataflash on CS0 */ 152 #define CONFIG_ENV_IS_IN_DATAFLASH 1 153 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400) 154 #define CONFIG_ENV_OFFSET 0x4200 155 #define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET) 156 #define CONFIG_ENV_SIZE 0x4200 157 #define CONFIG_BOOTCOMMAND "cp.b 0xC0084000 0x22000000 0x210000; bootm" 158 #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ 159 "root=/dev/mtdblock0 " \ 160 "mtdparts=atmel_nand:-(root) "\ 161 "rw rootfstype=jffs2" 162 163 #else /* CONFIG_SYS_USE_NANDFLASH */ 164 165 /* bootstrap + u-boot + env + linux in nandflash */ 166 #define CONFIG_ENV_IS_IN_NAND 1 167 #define CONFIG_ENV_OFFSET 0x60000 168 #define CONFIG_ENV_OFFSET_REDUND 0x80000 169 #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ 170 #define CONFIG_BOOTCOMMAND "nand read 0x22000000 0xA0000 0x200000; bootm" 171 #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ 172 "root=/dev/mtdblock5 " \ 173 "mtdparts=atmel_nand:128k(bootstrap)ro,256k(uboot)ro,128k(env1)ro,128k(env2)ro,2M(linux),-(root) " \ 174 "rw rootfstype=jffs2" 175 176 #endif 177 178 #define CONFIG_SYS_PROMPT "U-Boot> " 179 #define CONFIG_SYS_CBSIZE 256 180 #define CONFIG_SYS_MAXARGS 16 181 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 182 #define CONFIG_SYS_LONGHELP 1 183 #define CONFIG_CMDLINE_EDITING 1 184 #define CONFIG_AUTO_COMPLETE 185 186 /* 187 * Size of malloc() pool 188 */ 189 #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000) 190 191 #endif 192