1 /*
2  * (C) Copyright 2013 Atmel Corporation.
3  * Josh Wu <josh.wu@atmel.com>
4  *
5  * Configuation settings for the AT91SAM9N12-EK boards.
6  *
7  * SPDX-License-Identifier:	GPL-2.0+
8  */
9 
10 #ifndef __AT91SAM9N12_CONFIG_H_
11 #define __AT91SAM9N12_CONFIG_H_
12 
13 /*
14  * SoC must be defined first, before hardware.h is included.
15  * In this case SoC is defined in boards.cfg.
16  */
17 #include <asm/hardware.h>
18 
19 #define CONFIG_SYS_TEXT_BASE		0x26f00000
20 
21 /* ARM asynchronous clock */
22 #define CONFIG_SYS_AT91_SLOW_CLOCK	32768		/* slow clock xtal */
23 #define CONFIG_SYS_AT91_MAIN_CLOCK	16000000	/* main clock xtal */
24 
25 /* Misc CPU related */
26 #define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
27 #define CONFIG_SETUP_MEMORY_TAGS
28 #define CONFIG_INITRD_TAG
29 #define CONFIG_SKIP_LOWLEVEL_INIT
30 #define CONFIG_BOARD_EARLY_INIT_F
31 
32 /* general purpose I/O */
33 #define CONFIG_AT91_GPIO
34 
35 /* serial console */
36 #define CONFIG_ATMEL_USART
37 #define CONFIG_USART_BASE		ATMEL_BASE_DBGU
38 #define CONFIG_USART_ID			ATMEL_ID_SYS
39 #define CONFIG_BAUDRATE			115200
40 
41 /* LCD */
42 #define LCD_BPP				LCD_COLOR16
43 #define LCD_OUTPUT_BPP			24
44 #define CONFIG_LCD_LOGO
45 #define CONFIG_LCD_INFO
46 #define CONFIG_LCD_INFO_BELOW_LOGO
47 #define CONFIG_SYS_WHITE_ON_BLACK
48 #define CONFIG_ATMEL_HLCD
49 #define CONFIG_ATMEL_LCD_RGB565
50 
51 
52 /*
53  * BOOTP options
54  */
55 #define CONFIG_BOOTP_BOOTFILESIZE
56 #define CONFIG_BOOTP_BOOTPATH
57 #define CONFIG_BOOTP_GATEWAY
58 #define CONFIG_BOOTP_HOSTNAME
59 
60 /* NOR flash - no real flash on this board */
61 #define CONFIG_SYS_NO_FLASH
62 
63 /*
64  * Command line configuration.
65  */
66 #define CONFIG_CMD_NAND
67 
68 #define CONFIG_NR_DRAM_BANKS		1
69 #define CONFIG_SYS_SDRAM_BASE		0x20000000
70 #define CONFIG_SYS_SDRAM_SIZE		0x08000000
71 
72 /*
73  * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
74  * leaving the correct space for initial global data structure above
75  * that address while providing maximum stack area below.
76  */
77 # define CONFIG_SYS_INIT_SP_ADDR \
78 	(ATMEL_BASE_SRAM + 0x1000 - GENERATED_GBL_DATA_SIZE)
79 
80 /* DataFlash */
81 #ifdef CONFIG_CMD_SF
82 #define CONFIG_ATMEL_SPI
83 #define CONFIG_SF_DEFAULT_SPEED		30000000
84 #define CONFIG_ENV_SPI_MODE		SPI_MODE_3
85 #define CONFIG_SF_DEFAULT_MODE		SPI_MODE_3
86 #endif
87 
88 /* NAND flash */
89 #ifdef CONFIG_CMD_NAND
90 #define CONFIG_NAND_ATMEL
91 #define CONFIG_SYS_MAX_NAND_DEVICE	1
92 #define CONFIG_SYS_NAND_BASE		0x40000000
93 #define CONFIG_SYS_NAND_MASK_ALE	(1 << 21)
94 #define CONFIG_SYS_NAND_MASK_CLE	(1 << 22)
95 #define CONFIG_SYS_NAND_ENABLE_PIN	GPIO_PIN_PD(4)
96 #define CONFIG_SYS_NAND_READY_PIN	GPIO_PIN_PD(5)
97 
98 /* PMECC & PMERRLOC */
99 #define CONFIG_ATMEL_NAND_HWECC
100 #define CONFIG_ATMEL_NAND_HW_PMECC
101 #define CONFIG_PMECC_CAP		2
102 #define CONFIG_PMECC_SECTOR_SIZE	512
103 #define CONFIG_PMECC_INDEX_TABLE_OFFSET	0x8000
104 
105 #define CONFIG_CMD_NAND_TRIMFFS
106 
107 #endif
108 
109 #define CONFIG_MTD_PARTITIONS
110 #define CONFIG_MTD_DEVICE
111 #define CONFIG_CMD_MTDPARTS
112 #define MTDIDS_DEFAULT			"nand0=atmel_nand"
113 #define MTDPARTS_DEFAULT						\
114 	"mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,"		\
115 	"256k(env),256k(env_redundant),256k(spare),"			\
116 	"512k(dtb),6M(kernel)ro,-(rootfs)"
117 
118 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
119 	"console=console=ttyS0,115200\0"                                \
120 	"mtdparts="MTDPARTS_DEFAULT"\0"					\
121 	"bootargs_nand=rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs rw\0"\
122 	"bootargs_mmc=root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait\0"
123 
124 /* MMC */
125 #ifdef CONFIG_CMD_MMC
126 #define CONFIG_MMC
127 #define CONFIG_GENERIC_MMC
128 #define CONFIG_GENERIC_ATMEL_MCI
129 #endif
130 
131 /* FAT */
132 #ifdef CONFIG_CMD_FAT
133 #define CONFIG_DOS_PARTITION
134 #endif
135 
136 /* Ethernet */
137 #define CONFIG_KS8851_MLL
138 #define CONFIG_KS8851_MLL_BASEADDR	0x30000000 /* use NCS2 */
139 
140 #define CONFIG_SYS_LOAD_ADDR		0x22000000 /* load address */
141 
142 #define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
143 #define CONFIG_SYS_MEMTEST_END		0x26e00000
144 
145 /* USB host */
146 #ifdef CONFIG_CMD_USB
147 #define CONFIG_USB_ATMEL
148 #define CONFIG_USB_ATMEL_CLK_SEL_PLLB
149 #define CONFIG_USB_OHCI_NEW
150 #define CONFIG_SYS_USB_OHCI_CPU_INIT
151 #define CONFIG_SYS_USB_OHCI_REGS_BASE	ATMEL_BASE_OHCI
152 #define CONFIG_SYS_USB_OHCI_SLOT_NAME	"at91sam9n12"
153 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	1
154 #endif
155 
156 #ifdef CONFIG_SYS_USE_SPIFLASH
157 
158 /* bootstrap + u-boot + env + linux in dataflash on CS0 */
159 #define CONFIG_ENV_IS_IN_SPI_FLASH
160 #define CONFIG_ENV_OFFSET		0x5000
161 #define CONFIG_ENV_SIZE			0x3000
162 #define CONFIG_ENV_SECT_SIZE		0x1000
163 #define CONFIG_BOOTCOMMAND						\
164 	"setenv bootargs ${console} ${mtdparts} ${bootargs_nand};"	\
165 	"sf probe 0; sf read 0x22000000 0x100000 0x300000; "		\
166 	"bootm 0x22000000"
167 
168 #elif defined(CONFIG_SYS_USE_NANDFLASH)
169 
170 /* bootstrap + u-boot + env + linux in nandflash */
171 #define CONFIG_ENV_IS_IN_NAND
172 #define CONFIG_ENV_OFFSET		0xc0000
173 #define CONFIG_ENV_OFFSET_REDUND	0x100000
174 #define CONFIG_ENV_SIZE			0x20000		/* 1 sector = 128 kB */
175 #define CONFIG_BOOTCOMMAND						\
176 	"setenv bootargs ${console} ${mtdparts} ${bootargs_nand};"	\
177 	"nand read 0x21000000 0x180000 0x080000;"			\
178 	"nand read 0x22000000 0x200000 0x400000;"			\
179 	"bootm 0x22000000 - 0x21000000"
180 
181 #else /* CONFIG_SYS_USE_MMC */
182 
183 /* bootstrap + u-boot + env + linux in mmc */
184 
185 #ifdef CONFIG_ENV_IS_IN_MMC
186 /* Use raw reserved sectors to save environment */
187 #define CONFIG_ENV_OFFSET		0x2000
188 #define CONFIG_ENV_SIZE			0x1000
189 #define CONFIG_SYS_MMC_ENV_DEV		0
190 #else
191 /* Use file in FAT file to save environment */
192 #define CONFIG_ENV_IS_IN_FAT
193 #define CONFIG_FAT_WRITE
194 #define FAT_ENV_INTERFACE		"mmc"
195 #define FAT_ENV_FILE			"uboot.env"
196 #define FAT_ENV_DEVICE_AND_PART		"0"
197 #define CONFIG_ENV_SIZE			0x4000
198 #endif
199 
200 #define CONFIG_BOOTCOMMAND						\
201 	"setenv bootargs ${console} ${mtdparts} ${bootargs_mmc};"	\
202 	"fatload mmc 0:1 0x21000000 dtb;"				\
203 	"fatload mmc 0:1 0x22000000 uImage;"				\
204 	"bootm 0x22000000 - 0x21000000"
205 
206 #endif
207 
208 #define CONFIG_SYS_CBSIZE	256
209 #define CONFIG_SYS_MAXARGS	16
210 #define CONFIG_SYS_LONGHELP
211 #define CONFIG_CMDLINE_EDITING
212 #define CONFIG_AUTO_COMPLETE
213 
214 /*
215  * Size of malloc() pool
216  */
217 #define CONFIG_SYS_MALLOC_LEN	(4 * 1024 * 1024)
218 
219 /* SPL */
220 #define CONFIG_SPL_FRAMEWORK
221 #define CONFIG_SPL_TEXT_BASE		0x300000
222 #define CONFIG_SPL_MAX_SIZE		0x6000
223 #define CONFIG_SPL_STACK		0x308000
224 
225 #define CONFIG_SPL_BSS_START_ADDR	0x20000000
226 #define CONFIG_SPL_BSS_MAX_SIZE		0x80000
227 #define CONFIG_SYS_SPL_MALLOC_START	0x20080000
228 #define CONFIG_SYS_SPL_MALLOC_SIZE	0x80000
229 
230 #define CONFIG_SPL_BOARD_INIT
231 #define CONFIG_SYS_MONITOR_LEN		(512 << 10)
232 
233 #define CONFIG_SYS_MASTER_CLOCK		132096000
234 #define CONFIG_SYS_AT91_PLLA		0x20953f03
235 #define CONFIG_SYS_MCKR			0x1301
236 #define CONFIG_SYS_MCKR_CSS		0x1302
237 
238 #ifdef CONFIG_SYS_USE_MMC
239 #define CONFIG_SPL_LDSCRIPT		arch/arm/mach-at91/arm926ejs/u-boot-spl.lds
240 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	0x400
241 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200
242 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	1
243 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME		"u-boot.img"
244 
245 #elif CONFIG_SYS_USE_NANDFLASH
246 #define CONFIG_SPL_NAND_DRIVERS
247 #define CONFIG_SPL_NAND_BASE
248 #define CONFIG_SYS_NAND_U_BOOT_OFFS	0x40000
249 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
250 #define CONFIG_SYS_NAND_PAGE_SIZE	0x800
251 #define CONFIG_SYS_NAND_PAGE_COUNT	64
252 #define CONFIG_SYS_NAND_OOBSIZE		64
253 #define CONFIG_SYS_NAND_BLOCK_SIZE	0x20000
254 #define CONFIG_SYS_NAND_BAD_BLOCK_POS	0x0
255 #define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
256 
257 #elif CONFIG_SYS_USE_SPIFLASH
258 #define CONFIG_SPL_SPI_LOAD
259 #define CONFIG_SYS_SPI_U_BOOT_OFFS	0x8400
260 
261 #endif
262 
263 #endif
264