1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * (C) Copyright 2013 Atmel Corporation. 4 * Josh Wu <josh.wu@atmel.com> 5 * 6 * Configuation settings for the AT91SAM9N12-EK boards. 7 */ 8 9 #ifndef __AT91SAM9N12_CONFIG_H_ 10 #define __AT91SAM9N12_CONFIG_H_ 11 12 /* ARM asynchronous clock */ 13 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ 14 #define CONFIG_SYS_AT91_MAIN_CLOCK 16000000 /* main clock xtal */ 15 16 /* Misc CPU related */ 17 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 18 #define CONFIG_SETUP_MEMORY_TAGS 19 #define CONFIG_INITRD_TAG 20 #define CONFIG_SKIP_LOWLEVEL_INIT 21 22 /* LCD */ 23 #define LCD_BPP LCD_COLOR16 24 #define LCD_OUTPUT_BPP 24 25 #define CONFIG_LCD_LOGO 26 #define CONFIG_LCD_INFO 27 #define CONFIG_LCD_INFO_BELOW_LOGO 28 #define CONFIG_ATMEL_HLCD 29 #define CONFIG_ATMEL_LCD_RGB565 30 31 /* 32 * BOOTP options 33 */ 34 #define CONFIG_BOOTP_BOOTFILESIZE 35 36 #define CONFIG_SYS_SDRAM_BASE 0x20000000 37 #define CONFIG_SYS_SDRAM_SIZE 0x08000000 38 39 /* 40 * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM, 41 * leaving the correct space for initial global data structure above 42 * that address while providing maximum stack area below. 43 */ 44 # define CONFIG_SYS_INIT_SP_ADDR \ 45 (0x00300000 + 16 * 1024 - GENERATED_GBL_DATA_SIZE) 46 47 /* DataFlash */ 48 49 /* NAND flash */ 50 #ifdef CONFIG_CMD_NAND 51 #define CONFIG_SYS_MAX_NAND_DEVICE 1 52 #define CONFIG_SYS_NAND_BASE 0x40000000 53 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) 54 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) 55 #define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PD(4) 56 #define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PD(5) 57 #endif 58 59 #define CONFIG_EXTRA_ENV_SETTINGS \ 60 "console=console=ttyS0,115200\0" \ 61 "mtdparts="CONFIG_MTDPARTS_DEFAULT"\0" \ 62 "bootargs_nand=rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs rw\0"\ 63 "bootargs_mmc=root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait\0" 64 65 /* Ethernet */ 66 #define CONFIG_KS8851_MLL 67 #define CONFIG_KS8851_MLL_BASEADDR 0x30000000 /* use NCS2 */ 68 69 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ 70 71 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 72 #define CONFIG_SYS_MEMTEST_END 0x26e00000 73 74 /* USB host */ 75 #ifdef CONFIG_CMD_USB 76 #define CONFIG_USB_ATMEL 77 #define CONFIG_USB_ATMEL_CLK_SEL_PLLB 78 #define CONFIG_USB_OHCI_NEW 79 #define CONFIG_SYS_USB_OHCI_CPU_INIT 80 #define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI 81 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9n12" 82 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 83 #endif 84 85 #ifdef CONFIG_SPI_BOOT 86 87 /* bootstrap + u-boot + env + linux in dataflash on CS0 */ 88 #define CONFIG_ENV_OFFSET 0x5000 89 #define CONFIG_ENV_SIZE 0x3000 90 #define CONFIG_ENV_SECT_SIZE 0x1000 91 #define CONFIG_BOOTCOMMAND \ 92 "setenv bootargs ${console} ${mtdparts} ${bootargs_nand};" \ 93 "sf probe 0; sf read 0x22000000 0x100000 0x300000; " \ 94 "bootm 0x22000000" 95 96 #elif defined(CONFIG_NAND_BOOT) 97 98 /* bootstrap + u-boot + env + linux in nandflash */ 99 #define CONFIG_ENV_OFFSET 0x140000 100 #define CONFIG_ENV_OFFSET_REDUND 0x100000 101 #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ 102 #define CONFIG_BOOTCOMMAND \ 103 "setenv bootargs ${console} ${mtdparts} ${bootargs_nand};" \ 104 "nand read 0x21000000 0x180000 0x080000;" \ 105 "nand read 0x22000000 0x200000 0x400000;" \ 106 "bootm 0x22000000 - 0x21000000" 107 108 #else /* CONFIG_SD_BOOT */ 109 110 /* bootstrap + u-boot + env + linux in mmc */ 111 112 #ifdef CONFIG_ENV_IS_IN_MMC 113 /* Use raw reserved sectors to save environment */ 114 #define CONFIG_ENV_OFFSET 0x2000 115 #define CONFIG_ENV_SIZE 0x1000 116 #define CONFIG_SYS_MMC_ENV_DEV 0 117 #else 118 /* Use file in FAT file to save environment */ 119 #define CONFIG_ENV_SIZE 0x4000 120 #endif 121 122 #define CONFIG_BOOTCOMMAND \ 123 "setenv bootargs ${console} ${mtdparts} ${bootargs_mmc};" \ 124 "fatload mmc 0:1 0x21000000 dtb;" \ 125 "fatload mmc 0:1 0x22000000 uImage;" \ 126 "bootm 0x22000000 - 0x21000000" 127 128 #endif 129 130 /* 131 * Size of malloc() pool 132 */ 133 #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024) 134 135 /* SPL */ 136 #define CONFIG_SPL_TEXT_BASE 0x300000 137 #define CONFIG_SPL_MAX_SIZE 0x6000 138 #define CONFIG_SPL_STACK 0x308000 139 140 #define CONFIG_SPL_BSS_START_ADDR 0x20000000 141 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 142 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 143 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 144 145 #define CONFIG_SYS_MONITOR_LEN (512 << 10) 146 147 #define CONFIG_SYS_MASTER_CLOCK 132096000 148 #define CONFIG_SYS_AT91_PLLA 0x20953f03 149 #define CONFIG_SYS_MCKR 0x1301 150 #define CONFIG_SYS_MCKR_CSS 0x1302 151 152 #ifdef CONFIG_SD_BOOT 153 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 154 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 155 156 #elif CONFIG_SYS_USE_NANDFLASH 157 #elif CONFIG_SPI_BOOT 158 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8400 159 160 #elif CONFIG_NAND_BOOT 161 #define CONFIG_SPL_NAND_DRIVERS 162 #define CONFIG_SPL_NAND_BASE 163 #endif 164 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000 165 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 166 #define CONFIG_SYS_NAND_PAGE_SIZE 0x800 167 #define CONFIG_SYS_NAND_PAGE_COUNT 64 168 #define CONFIG_SYS_NAND_OOBSIZE 64 169 #define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000 170 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 171 172 #endif 173