1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * (C) Copyright 2013 Atmel Corporation. 4 * Josh Wu <josh.wu@atmel.com> 5 * 6 * Configuation settings for the AT91SAM9N12-EK boards. 7 */ 8 9 #ifndef __AT91SAM9N12_CONFIG_H_ 10 #define __AT91SAM9N12_CONFIG_H_ 11 12 /* ARM asynchronous clock */ 13 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ 14 #define CONFIG_SYS_AT91_MAIN_CLOCK 16000000 /* main clock xtal */ 15 16 /* Misc CPU related */ 17 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 18 #define CONFIG_SETUP_MEMORY_TAGS 19 #define CONFIG_INITRD_TAG 20 #define CONFIG_SKIP_LOWLEVEL_INIT 21 22 /* LCD */ 23 #define LCD_BPP LCD_COLOR16 24 #define LCD_OUTPUT_BPP 24 25 #define CONFIG_LCD_LOGO 26 #define CONFIG_LCD_INFO 27 #define CONFIG_LCD_INFO_BELOW_LOGO 28 #define CONFIG_ATMEL_HLCD 29 #define CONFIG_ATMEL_LCD_RGB565 30 31 /* 32 * BOOTP options 33 */ 34 #define CONFIG_BOOTP_BOOTFILESIZE 35 36 #define CONFIG_SYS_SDRAM_BASE 0x20000000 37 #define CONFIG_SYS_SDRAM_SIZE 0x08000000 38 39 /* 40 * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM, 41 * leaving the correct space for initial global data structure above 42 * that address while providing maximum stack area below. 43 */ 44 # define CONFIG_SYS_INIT_SP_ADDR \ 45 (0x00300000 + 16 * 1024 - GENERATED_GBL_DATA_SIZE) 46 47 /* DataFlash */ 48 #ifdef CONFIG_CMD_SF 49 #define CONFIG_SF_DEFAULT_SPEED 30000000 50 #endif 51 52 /* NAND flash */ 53 #ifdef CONFIG_CMD_NAND 54 #define CONFIG_SYS_MAX_NAND_DEVICE 1 55 #define CONFIG_SYS_NAND_BASE 0x40000000 56 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) 57 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) 58 #define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PD(4) 59 #define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PD(5) 60 #endif 61 62 #define CONFIG_EXTRA_ENV_SETTINGS \ 63 "console=console=ttyS0,115200\0" \ 64 "mtdparts="CONFIG_MTDPARTS_DEFAULT"\0" \ 65 "bootargs_nand=rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs rw\0"\ 66 "bootargs_mmc=root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait\0" 67 68 /* Ethernet */ 69 #define CONFIG_KS8851_MLL 70 #define CONFIG_KS8851_MLL_BASEADDR 0x30000000 /* use NCS2 */ 71 72 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ 73 74 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 75 #define CONFIG_SYS_MEMTEST_END 0x26e00000 76 77 /* USB host */ 78 #ifdef CONFIG_CMD_USB 79 #define CONFIG_USB_ATMEL 80 #define CONFIG_USB_ATMEL_CLK_SEL_PLLB 81 #define CONFIG_USB_OHCI_NEW 82 #define CONFIG_SYS_USB_OHCI_CPU_INIT 83 #define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI 84 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9n12" 85 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 86 #endif 87 88 #ifdef CONFIG_SPI_BOOT 89 90 /* bootstrap + u-boot + env + linux in dataflash on CS0 */ 91 #define CONFIG_ENV_OFFSET 0x5000 92 #define CONFIG_ENV_SIZE 0x3000 93 #define CONFIG_ENV_SECT_SIZE 0x1000 94 #define CONFIG_BOOTCOMMAND \ 95 "setenv bootargs ${console} ${mtdparts} ${bootargs_nand};" \ 96 "sf probe 0; sf read 0x22000000 0x100000 0x300000; " \ 97 "bootm 0x22000000" 98 99 #elif defined(CONFIG_NAND_BOOT) 100 101 /* bootstrap + u-boot + env + linux in nandflash */ 102 #define CONFIG_ENV_OFFSET 0x140000 103 #define CONFIG_ENV_OFFSET_REDUND 0x100000 104 #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ 105 #define CONFIG_BOOTCOMMAND \ 106 "setenv bootargs ${console} ${mtdparts} ${bootargs_nand};" \ 107 "nand read 0x21000000 0x180000 0x080000;" \ 108 "nand read 0x22000000 0x200000 0x400000;" \ 109 "bootm 0x22000000 - 0x21000000" 110 111 #else /* CONFIG_SD_BOOT */ 112 113 /* bootstrap + u-boot + env + linux in mmc */ 114 115 #ifdef CONFIG_ENV_IS_IN_MMC 116 /* Use raw reserved sectors to save environment */ 117 #define CONFIG_ENV_OFFSET 0x2000 118 #define CONFIG_ENV_SIZE 0x1000 119 #define CONFIG_SYS_MMC_ENV_DEV 0 120 #else 121 /* Use file in FAT file to save environment */ 122 #define CONFIG_ENV_SIZE 0x4000 123 #endif 124 125 #define CONFIG_BOOTCOMMAND \ 126 "setenv bootargs ${console} ${mtdparts} ${bootargs_mmc};" \ 127 "fatload mmc 0:1 0x21000000 dtb;" \ 128 "fatload mmc 0:1 0x22000000 uImage;" \ 129 "bootm 0x22000000 - 0x21000000" 130 131 #endif 132 133 /* 134 * Size of malloc() pool 135 */ 136 #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024) 137 138 /* SPL */ 139 #define CONFIG_SPL_TEXT_BASE 0x300000 140 #define CONFIG_SPL_MAX_SIZE 0x6000 141 #define CONFIG_SPL_STACK 0x308000 142 143 #define CONFIG_SPL_BSS_START_ADDR 0x20000000 144 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 145 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 146 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 147 148 #define CONFIG_SYS_MONITOR_LEN (512 << 10) 149 150 #define CONFIG_SYS_MASTER_CLOCK 132096000 151 #define CONFIG_SYS_AT91_PLLA 0x20953f03 152 #define CONFIG_SYS_MCKR 0x1301 153 #define CONFIG_SYS_MCKR_CSS 0x1302 154 155 #ifdef CONFIG_SD_BOOT 156 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 157 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 158 159 #elif CONFIG_SYS_USE_NANDFLASH 160 #elif CONFIG_SPI_BOOT 161 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8400 162 163 #elif CONFIG_NAND_BOOT 164 #define CONFIG_SPL_NAND_DRIVERS 165 #define CONFIG_SPL_NAND_BASE 166 #endif 167 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000 168 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 169 #define CONFIG_SYS_NAND_PAGE_SIZE 0x800 170 #define CONFIG_SYS_NAND_PAGE_COUNT 64 171 #define CONFIG_SYS_NAND_OOBSIZE 64 172 #define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000 173 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 174 175 #endif 176