1 /*
2  * (C) Copyright 2007-2008
3  * Stelian Pop <stelian.pop@leadtechdesign.com>
4  * Lead Tech Design <www.leadtechdesign.com>
5  *
6  * Configuation settings for the AT91SAM9M10G45EK board(and AT91SAM9G45EKES).
7  *
8  * See file CREDITS for list of people who contributed to this
9  * project.
10  *
11  * This program is free software; you can redistribute it and/or
12  * modify it under the terms of the GNU General Public License as
13  * published by the Free Software Foundation; either version 2 of
14  * the License, or (at your option) any later version.
15  *
16  * This program is distributed in the hope that it will be useful,
17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19  * GNU General Public License for more details.
20  *
21  * You should have received a copy of the GNU General Public License
22  * along with this program; if not, write to the Free Software
23  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24  * MA 02111-1307 USA
25  */
26 
27 #ifndef __CONFIG_H
28 #define __CONFIG_H
29 
30 #define CONFIG_AT91_LEGACY
31 
32 /* ARM asynchronous clock */
33 #define CONFIG_SYS_AT91_MAIN_CLOCK	12000000	/* from 12 MHz crystal */
34 #define CONFIG_SYS_HZ		1000
35 
36 #define CONFIG_ARM926EJS	1	/* This is an ARM926EJS Core	*/
37 #ifdef CONFIG_AT91SAM9M10G45EK
38 #define CONFIG_AT91SAM9M10G45	1	/* It's an Atmel AT91SAM9M10G45 SoC*/
39 #else
40 #define CONFIG_AT91SAM9G45	1	/* It's an Atmel AT91SAM9G45 SoC*/
41 #endif
42 #define CONFIG_ARCH_CPU_INIT
43 #undef CONFIG_USE_IRQ			/* we don't need IRQ/FIQ stuff	*/
44 
45 #define CONFIG_CMDLINE_TAG	1	/* enable passing of ATAGs	*/
46 #define CONFIG_SETUP_MEMORY_TAGS 1
47 #define CONFIG_INITRD_TAG	1
48 
49 #define CONFIG_SKIP_LOWLEVEL_INIT
50 #define CONFIG_SKIP_RELOCATE_UBOOT
51 
52 /*
53  * Hardware drivers
54  */
55 #define CONFIG_AT91_GPIO	1
56 #define CONFIG_ATMEL_USART	1
57 #undef CONFIG_USART0
58 #undef CONFIG_USART1
59 #undef CONFIG_USART2
60 #define CONFIG_USART3		1	/* USART 3 is DBGU */
61 
62 /* LCD */
63 #define CONFIG_LCD			1
64 #define LCD_BPP				LCD_COLOR8
65 #define CONFIG_LCD_LOGO			1
66 #undef LCD_TEST_PATTERN
67 #define CONFIG_LCD_INFO			1
68 #define CONFIG_LCD_INFO_BELOW_LOGO	1
69 #define CONFIG_SYS_WHITE_ON_BLACK		1
70 #define CONFIG_ATMEL_LCD		1
71 #define CONFIG_ATMEL_LCD_RGB565		1
72 #define CONFIG_SYS_CONSOLE_IS_IN_ENV		1
73 /* board specific(not enough SRAM) */
74 #define CONFIG_AT91SAM9G45_LCD_BASE		0x73E00000
75 
76 /* LED */
77 #define CONFIG_AT91_LED
78 #define	CONFIG_RED_LED		AT91_PIN_PD31	/* this is the user1 led */
79 #define	CONFIG_GREEN_LED	AT91_PIN_PD0	/* this is the user2 led */
80 
81 #define CONFIG_BOOTDELAY	3
82 
83 /*
84  * BOOTP options
85  */
86 #define CONFIG_BOOTP_BOOTFILESIZE	1
87 #define CONFIG_BOOTP_BOOTPATH		1
88 #define CONFIG_BOOTP_GATEWAY		1
89 #define CONFIG_BOOTP_HOSTNAME		1
90 
91 /*
92  * Command line configuration.
93  */
94 #include <config_cmd_default.h>
95 #undef CONFIG_CMD_BDI
96 #undef CONFIG_CMD_FPGA
97 #undef CONFIG_CMD_IMI
98 #undef CONFIG_CMD_IMLS
99 #undef CONFIG_CMD_AUTOSCRIPT
100 #undef CONFIG_CMD_LOADS
101 
102 #define CONFIG_CMD_PING		1
103 #define CONFIG_CMD_DHCP		1
104 #define CONFIG_CMD_NAND		1
105 #define CONFIG_CMD_USB		1
106 
107 /* SDRAM */
108 #define CONFIG_NR_DRAM_BANKS		1
109 #define PHYS_SDRAM			0x70000000
110 #define PHYS_SDRAM_SIZE			0x08000000	/* 128 megs */
111 
112 /* DataFlash */
113 #ifdef CONFIG_ATMEL_SPI
114 #define CONFIG_CMD_SF
115 #define CONFIG_CMD_SPI
116 #define CONFIG_SPI_FLASH		1
117 #define CONFIG_SPI_FLASH_ATMEL		1
118 #define CONFIG_SYS_MAX_DATAFLASH_BANKS	1
119 #endif
120 
121 /* NOR flash, if populated */
122 #ifndef CONFIG_CMD_NAND
123 #define CONFIG_SYS_NO_FLASH		1
124 #else
125 #define CONFIG_SYS_FLASH_CFI		1
126 #define CONFIG_FLASH_CFI_DRIVER		1
127 #define PHYS_FLASH_1			0x10000000
128 #define CONFIG_SYS_FLASH_BASE			PHYS_FLASH_1
129 #define CONFIG_SYS_MAX_FLASH_SECT		256
130 #define CONFIG_SYS_MAX_FLASH_BANKS		1
131 #endif
132 
133 /* NAND flash */
134 #ifdef CONFIG_CMD_NAND
135 #define CONFIG_NAND_MAX_CHIPS			1
136 #define CONFIG_NAND_ATMEL
137 #define CONFIG_SYS_MAX_NAND_DEVICE		1
138 #define CONFIG_SYS_NAND_BASE			0x40000000
139 #define CONFIG_SYS_NAND_DBW_8			1
140 /* our ALE is AD21 */
141 #define CONFIG_SYS_NAND_MASK_ALE		(1 << 21)
142 /* our CLE is AD22 */
143 #define CONFIG_SYS_NAND_MASK_CLE		(1 << 22)
144 #define CONFIG_SYS_NAND_ENABLE_PIN		AT91_PIN_PC14
145 #define CONFIG_SYS_NAND_READY_PIN		AT91_PIN_PC8
146 
147 #endif
148 
149 /* Ethernet */
150 #define CONFIG_MACB			1
151 #define CONFIG_RMII			1
152 #define CONFIG_NET_MULTI		1
153 #define CONFIG_NET_RETRY_COUNT		20
154 #define CONFIG_RESET_PHY_R		1
155 
156 /* USB */
157 #define CONFIG_USB_ATMEL
158 #define CONFIG_USB_OHCI_NEW		1
159 #define CONFIG_DOS_PARTITION		1
160 #define CONFIG_SYS_USB_OHCI_CPU_INIT		1
161 #define CONFIG_SYS_USB_OHCI_REGS_BASE		0x00700000	/* AT91SAM9G45_UHP_OHCI_BASE */
162 #define CONFIG_SYS_USB_OHCI_SLOT_NAME		"at91sam9g45"
163 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	2
164 #define CONFIG_USB_STORAGE		1
165 
166 #define CONFIG_SYS_LOAD_ADDR			0x22000000	/* load address */
167 
168 #define CONFIG_SYS_MEMTEST_START		PHYS_SDRAM
169 #define CONFIG_SYS_MEMTEST_END			0x23e00000
170 
171 #ifdef CONFIG_SYS_USE_DATAFLASH
172 
173 /* bootstrap + u-boot + env + linux in dataflash on CS0 */
174 #define CONFIG_ENV_IS_IN_SPI_FLASH	1
175 #define CONFIG_SYS_MONITOR_BASE	(0xC0000000 + 0x8400)
176 #define CONFIG_ENV_OFFSET		0x4200
177 #define CONFIG_ENV_ADDR		(0xC0000000 + CONFIG_ENV_OFFSET)
178 #define CONFIG_ENV_SIZE		0x4200
179 #define CONFIG_ENV_SECT_SIZE		0x10000
180 #define CONFIG_BOOTCOMMAND	"cp.b 0xC0042000 0x22000000 0x210000; bootm"
181 #define CONFIG_BOOTARGS		"console=ttyS0,115200 " \
182 				"root=/dev/mtdblock0 " \
183 				"mtdparts=atmel_nand:-(root) "\
184 				"rw rootfstype=jffs2"
185 
186 #else /* CONFIG_SYS_USE_NANDFLASH */
187 
188 /* bootstrap + u-boot + env + linux in nandflash */
189 #define CONFIG_ENV_IS_IN_NAND	1
190 #define CONFIG_ENV_OFFSET		0x60000
191 #define CONFIG_ENV_OFFSET_REDUND	0x80000
192 #define CONFIG_ENV_SIZE		0x20000		/* 1 sector = 128 kB */
193 #define CONFIG_BOOTCOMMAND	"nand read 0x72000000 0x200000 0x200000; bootm"
194 #define CONFIG_BOOTARGS		"console=ttyS0,115200 " \
195 				"root=/dev/mtdblock5 " \
196 				"mtdparts=atmel_nand:128k(bootstrap)ro, \
197 				256k(uboot)ro,128k(env1)ro,128k(env2)ro, \
198 				2M(linux),-(root) " \
199 				"rw rootfstype=jffs2"
200 
201 #endif
202 
203 #define CONFIG_BAUDRATE		115200
204 #define CONFIG_SYS_BAUDRATE_TABLE	{115200 , 19200, 38400, 57600, 9600 }
205 
206 #define CONFIG_SYS_PROMPT		"U-Boot> "
207 #define CONFIG_SYS_CBSIZE		256
208 #define CONFIG_SYS_MAXARGS		16
209 #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
210 #define CONFIG_SYS_LONGHELP		1
211 #define CONFIG_CMDLINE_EDITING	1
212 #define CONFIG_AUTO_COMPLETE
213 #define CONFIG_SYS_HUSH_PARSER
214 #define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
215 
216 /*
217  * Size of malloc() pool
218  */
219 #define CONFIG_SYS_MALLOC_LEN		ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
220 #define CONFIG_SYS_GBL_DATA_SIZE	128	/* 128 bytes for initial data */
221 
222 #define CONFIG_STACKSIZE	(32*1024)	/* regular stack */
223 
224 #ifdef CONFIG_USE_IRQ
225 #error CONFIG_USE_IRQ not supported
226 #endif
227 
228 #endif
229