1 /* 2 * (C) Copyright 2007-2008 3 * Stelian Pop <stelian@popies.net> 4 * Lead Tech Design <www.leadtechdesign.com> 5 * 6 * Configuation settings for the AT91SAM9M10G45EK board(and AT91SAM9G45EKES). 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11 #ifndef __CONFIG_H 12 #define __CONFIG_H 13 14 #include <asm/hardware.h> 15 16 #define CONFIG_SYS_TEXT_BASE 0x73f00000 17 18 #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ 19 20 /* ARM asynchronous clock */ 21 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 22 #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */ 23 24 #define CONFIG_AT91SAM9M10G45EK 25 26 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 27 #define CONFIG_SETUP_MEMORY_TAGS 28 #define CONFIG_INITRD_TAG 29 #define CONFIG_SKIP_LOWLEVEL_INIT 30 #define CONFIG_BOARD_EARLY_INIT_F 31 #define CONFIG_DISPLAY_CPUINFO 32 33 #define CONFIG_CMD_BOOTZ 34 #define CONFIG_OF_LIBFDT 35 36 #define CONFIG_SYS_GENERIC_BOARD 37 38 /* general purpose I/O */ 39 #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ 40 #define CONFIG_AT91_GPIO 41 #define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */ 42 43 /* serial console */ 44 #define CONFIG_ATMEL_USART 45 #define CONFIG_USART_BASE ATMEL_BASE_DBGU 46 #define CONFIG_USART_ID ATMEL_ID_SYS 47 48 /* LCD */ 49 #define CONFIG_LCD 50 #define LCD_BPP LCD_COLOR8 51 #define CONFIG_LCD_LOGO 52 #undef LCD_TEST_PATTERN 53 #define CONFIG_LCD_INFO 54 #define CONFIG_LCD_INFO_BELOW_LOGO 55 #define CONFIG_SYS_WHITE_ON_BLACK 56 #define CONFIG_ATMEL_LCD 57 #define CONFIG_ATMEL_LCD_RGB565 58 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 59 /* board specific(not enough SRAM) */ 60 #define CONFIG_AT91SAM9G45_LCD_BASE 0x73E00000 61 62 /* LED */ 63 #define CONFIG_AT91_LED 64 #define CONFIG_RED_LED AT91_PIN_PD31 /* this is the user1 led */ 65 #define CONFIG_GREEN_LED AT91_PIN_PD0 /* this is the user2 led */ 66 67 #define CONFIG_BOOTDELAY 3 68 69 /* 70 * BOOTP options 71 */ 72 #define CONFIG_BOOTP_BOOTFILESIZE 73 #define CONFIG_BOOTP_BOOTPATH 74 #define CONFIG_BOOTP_GATEWAY 75 #define CONFIG_BOOTP_HOSTNAME 76 77 /* 78 * Command line configuration. 79 */ 80 81 /* No NOR flash */ 82 #define CONFIG_SYS_NO_FLASH 83 84 #include <config_cmd_default.h> 85 #undef CONFIG_CMD_BDI 86 #undef CONFIG_CMD_FPGA 87 #undef CONFIG_CMD_IMI 88 #undef CONFIG_CMD_IMLS 89 #undef CONFIG_CMD_LOADS 90 91 #define CONFIG_CMD_PING 92 #define CONFIG_CMD_DHCP 93 #define CONFIG_CMD_NAND 94 #define CONFIG_CMD_USB 95 96 /* SDRAM */ 97 #define CONFIG_NR_DRAM_BANKS 1 98 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS6 99 #define CONFIG_SYS_SDRAM_SIZE 0x08000000 100 101 #define CONFIG_SYS_INIT_SP_ADDR \ 102 (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE) 103 104 /* NAND flash */ 105 #ifdef CONFIG_CMD_NAND 106 #define CONFIG_NAND_ATMEL 107 #define CONFIG_SYS_MAX_NAND_DEVICE 1 108 #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 109 #define CONFIG_SYS_NAND_DBW_8 110 /* our ALE is AD21 */ 111 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) 112 /* our CLE is AD22 */ 113 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) 114 #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 115 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC8 116 117 #endif 118 119 /* MMC */ 120 #define CONFIG_CMD_MMC 121 122 #ifdef CONFIG_CMD_MMC 123 #define CONFIG_MMC 124 #define CONFIG_GENERIC_MMC 125 #define CONFIG_GENERIC_ATMEL_MCI 126 #endif 127 128 #if defined(CONFIG_CMD_USB) || defined(CONFIG_CMD_MMC) 129 #define CONFIG_CMD_FAT 130 #define CONFIG_DOS_PARTITION 131 #endif 132 133 /* Ethernet */ 134 #define CONFIG_MACB 135 #define CONFIG_RMII 136 #define CONFIG_NET_RETRY_COUNT 20 137 #define CONFIG_RESET_PHY_R 138 #define CONFIG_AT91_WANTS_COMMON_PHY 139 140 /* USB */ 141 #define CONFIG_USB_EHCI 142 #define CONFIG_USB_EHCI_ATMEL 143 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 2 144 #define CONFIG_USB_STORAGE 145 146 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ 147 148 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 149 #define CONFIG_SYS_MEMTEST_END 0x23e00000 150 151 #ifdef CONFIG_SYS_USE_NANDFLASH 152 /* bootstrap + u-boot + env in nandflash */ 153 #define CONFIG_ENV_IS_IN_NAND 154 #define CONFIG_ENV_OFFSET 0xc0000 155 #define CONFIG_ENV_OFFSET_REDUND 0x100000 156 #define CONFIG_ENV_SIZE 0x20000 157 158 #define CONFIG_BOOTCOMMAND \ 159 "nand read 0x70000000 0x200000 0x300000;" \ 160 "bootm 0x70000000" 161 #define CONFIG_BOOTARGS \ 162 "console=ttyS0,115200 earlyprintk " \ 163 "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \ 164 "256k(env),256k(env_redundant),256k(spare)," \ 165 "512k(dtb),6M(kernel)ro,-(rootfs) " \ 166 "root=/dev/mtdblock7 rw rootfstype=jffs2" 167 #elif CONFIG_SYS_USE_MMC 168 /* bootstrap + u-boot + env + linux in mmc */ 169 #define FAT_ENV_INTERFACE "mmc" 170 /* 171 * We don't specify the part number, if device 0 has partition table, it means 172 * the first partition; it no partition table, then take whole device as a 173 * FAT file system. 174 */ 175 #define FAT_ENV_DEVICE_AND_PART "0" 176 #define FAT_ENV_FILE "uboot.env" 177 #define CONFIG_ENV_IS_IN_FAT 178 #define CONFIG_FAT_WRITE 179 #define CONFIG_ENV_SIZE 0x4000 180 181 #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ 182 "mtdparts=atmel_nand:" \ 183 "8M(bootstrap/uboot/kernel)ro,-(rootfs) " \ 184 "root=/dev/mmcblk0p2 rw rootwait" 185 #define CONFIG_BOOTCOMMAND "fatload mmc 0:1 0x71000000 dtb; " \ 186 "fatload mmc 0:1 0x72000000 zImage; " \ 187 "bootz 0x72000000 - 0x71000000" 188 #endif 189 190 #define CONFIG_BAUDRATE 115200 191 192 #define CONFIG_SYS_PROMPT "U-Boot> " 193 #define CONFIG_SYS_CBSIZE 256 194 #define CONFIG_SYS_MAXARGS 16 195 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 196 #define CONFIG_SYS_LONGHELP 197 #define CONFIG_CMDLINE_EDITING 198 #define CONFIG_AUTO_COMPLETE 199 #define CONFIG_SYS_HUSH_PARSER 200 201 /* 202 * Size of malloc() pool 203 */ 204 #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000) 205 206 /* Defines for SPL */ 207 #define CONFIG_SPL_FRAMEWORK 208 #define CONFIG_SPL_TEXT_BASE 0x300000 209 #define CONFIG_SPL_MAX_SIZE 0x010000 210 #define CONFIG_SPL_STACK 0x310000 211 212 #define CONFIG_SPL_LIBCOMMON_SUPPORT 213 #define CONFIG_SPL_LIBGENERIC_SUPPORT 214 #define CONFIG_SPL_SERIAL_SUPPORT 215 #define CONFIG_SPL_GPIO_SUPPORT 216 217 #define CONFIG_SYS_MONITOR_LEN 0x80000 218 219 #ifdef CONFIG_SYS_USE_MMC 220 221 #define CONFIG_SPL_BSS_START_ADDR 0x70000000 222 #define CONFIG_SPL_BSS_MAX_SIZE 0x00080000 223 #define CONFIG_SYS_SPL_MALLOC_START 0x70080000 224 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00080000 225 226 #define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/arm926ejs/u-boot-spl.lds 227 #define CONFIG_SPL_MMC_SUPPORT 228 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x400 229 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200 230 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 231 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 232 #define CONFIG_SPL_FAT_SUPPORT 233 #define CONFIG_SPL_LIBDISK_SUPPORT 234 235 #elif CONFIG_SYS_USE_NANDFLASH 236 #define CONFIG_SPL_NAND_SUPPORT 237 #define CONFIG_SPL_NAND_DRIVERS 238 #define CONFIG_SPL_NAND_BASE 239 #define CONFIG_SPL_NAND_ECC 240 #define CONFIG_SPL_NAND_SOFTECC 241 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000 242 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000 243 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 244 245 #define CONFIG_SYS_NAND_PAGE_SIZE 0x800 246 #define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000 247 #define CONFIG_SYS_NAND_PAGE_COUNT 64 248 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS 249 #define CONFIG_SYS_NAND_ECCSIZE 256 250 #define CONFIG_SYS_NAND_ECCBYTES 3 251 #define CONFIG_SYS_NAND_OOBSIZE 64 252 #define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \ 253 48, 49, 50, 51, 52, 53, 54, 55, \ 254 56, 57, 58, 59, 60, 61, 62, 63, } 255 #endif 256 257 #define CONFIG_SPL_ATMEL_SIZE 258 #define CONFIG_SYS_MASTER_CLOCK 132096000 259 #define CONFIG_SYS_AT91_PLLA 0x20c73f03 260 #define CONFIG_SYS_MCKR 0x1301 261 #define CONFIG_SYS_MCKR_CSS 0x1302 262 263 #define ATMEL_BASE_MPDDRC ATMEL_BASE_DDRSDRC0 264 #endif 265