1 /* 2 * (C) Copyright 2007-2008 3 * Stelian Pop <stelian@popies.net> 4 * Lead Tech Design <www.leadtechdesign.com> 5 * 6 * Configuation settings for the AT91SAM9M10G45EK board(and AT91SAM9G45EKES). 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11 #ifndef __CONFIG_H 12 #define __CONFIG_H 13 14 #include <asm/hardware.h> 15 16 #define CONFIG_SYS_TEXT_BASE 0x73f00000 17 18 #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ 19 20 /* ARM asynchronous clock */ 21 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 22 #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */ 23 24 #define CONFIG_AT91SAM9M10G45EK 25 26 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 27 #define CONFIG_SETUP_MEMORY_TAGS 28 #define CONFIG_INITRD_TAG 29 #define CONFIG_SKIP_LOWLEVEL_INIT 30 #define CONFIG_BOARD_EARLY_INIT_F 31 32 /* general purpose I/O */ 33 #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ 34 #define CONFIG_AT91_GPIO 35 #define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */ 36 37 /* serial console */ 38 #define CONFIG_ATMEL_USART 39 #define CONFIG_USART_BASE ATMEL_BASE_DBGU 40 #define CONFIG_USART_ID ATMEL_ID_SYS 41 42 /* LCD */ 43 #define LCD_BPP LCD_COLOR8 44 #define CONFIG_LCD_LOGO 45 #undef LCD_TEST_PATTERN 46 #define CONFIG_LCD_INFO 47 #define CONFIG_LCD_INFO_BELOW_LOGO 48 #define CONFIG_SYS_WHITE_ON_BLACK 49 #define CONFIG_ATMEL_LCD 50 #define CONFIG_ATMEL_LCD_RGB565 51 /* board specific(not enough SRAM) */ 52 #define CONFIG_AT91SAM9G45_LCD_BASE 0x73E00000 53 54 /* LED */ 55 #define CONFIG_AT91_LED 56 #define CONFIG_RED_LED AT91_PIN_PD31 /* this is the user1 led */ 57 #define CONFIG_GREEN_LED AT91_PIN_PD0 /* this is the user2 led */ 58 59 60 /* 61 * BOOTP options 62 */ 63 #define CONFIG_BOOTP_BOOTFILESIZE 64 #define CONFIG_BOOTP_BOOTPATH 65 #define CONFIG_BOOTP_GATEWAY 66 #define CONFIG_BOOTP_HOSTNAME 67 68 /* 69 * Command line configuration. 70 */ 71 72 /* No NOR flash */ 73 #define CONFIG_SYS_NO_FLASH 74 #define CONFIG_CMD_NAND 75 76 /* SDRAM */ 77 #define CONFIG_NR_DRAM_BANKS 1 78 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS6 79 #define CONFIG_SYS_SDRAM_SIZE 0x08000000 80 81 #define CONFIG_SYS_INIT_SP_ADDR \ 82 (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE) 83 84 /* NAND flash */ 85 #ifdef CONFIG_CMD_NAND 86 #define CONFIG_NAND_ATMEL 87 #define CONFIG_SYS_MAX_NAND_DEVICE 1 88 #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 89 #define CONFIG_SYS_NAND_DBW_8 90 /* our ALE is AD21 */ 91 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) 92 /* our CLE is AD22 */ 93 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) 94 #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 95 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC8 96 97 #endif 98 99 /* MMC */ 100 101 #ifdef CONFIG_CMD_MMC 102 #define CONFIG_MMC 103 #define CONFIG_GENERIC_MMC 104 #define CONFIG_GENERIC_ATMEL_MCI 105 #endif 106 107 #if defined(CONFIG_CMD_USB) || defined(CONFIG_CMD_MMC) 108 #define CONFIG_DOS_PARTITION 109 #endif 110 111 /* Ethernet */ 112 #define CONFIG_MACB 113 #define CONFIG_RMII 114 #define CONFIG_NET_RETRY_COUNT 20 115 #define CONFIG_RESET_PHY_R 116 #define CONFIG_AT91_WANTS_COMMON_PHY 117 118 /* USB */ 119 #define CONFIG_USB_EHCI 120 #define CONFIG_USB_EHCI_ATMEL 121 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 2 122 123 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ 124 125 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 126 #define CONFIG_SYS_MEMTEST_END 0x23e00000 127 128 #ifdef CONFIG_SYS_USE_NANDFLASH 129 /* bootstrap + u-boot + env in nandflash */ 130 #define CONFIG_ENV_IS_IN_NAND 131 #define CONFIG_ENV_OFFSET 0xc0000 132 #define CONFIG_ENV_OFFSET_REDUND 0x100000 133 #define CONFIG_ENV_SIZE 0x20000 134 135 #define CONFIG_BOOTCOMMAND \ 136 "nand read 0x70000000 0x200000 0x300000;" \ 137 "bootm 0x70000000" 138 #define CONFIG_BOOTARGS \ 139 "console=ttyS0,115200 earlyprintk " \ 140 "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \ 141 "256k(env),256k(env_redundant),256k(spare)," \ 142 "512k(dtb),6M(kernel)ro,-(rootfs) " \ 143 "root=/dev/mtdblock7 rw rootfstype=jffs2" 144 #elif CONFIG_SYS_USE_MMC 145 /* bootstrap + u-boot + env + linux in mmc */ 146 #define FAT_ENV_INTERFACE "mmc" 147 /* 148 * We don't specify the part number, if device 0 has partition table, it means 149 * the first partition; it no partition table, then take whole device as a 150 * FAT file system. 151 */ 152 #define FAT_ENV_DEVICE_AND_PART "0" 153 #define FAT_ENV_FILE "uboot.env" 154 #define CONFIG_ENV_IS_IN_FAT 155 #define CONFIG_FAT_WRITE 156 #define CONFIG_ENV_SIZE 0x4000 157 158 #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ 159 "mtdparts=atmel_nand:" \ 160 "8M(bootstrap/uboot/kernel)ro,-(rootfs) " \ 161 "root=/dev/mmcblk0p2 rw rootwait" 162 #define CONFIG_BOOTCOMMAND "fatload mmc 0:1 0x71000000 dtb; " \ 163 "fatload mmc 0:1 0x72000000 zImage; " \ 164 "bootz 0x72000000 - 0x71000000" 165 #endif 166 167 #define CONFIG_BAUDRATE 115200 168 169 #define CONFIG_SYS_CBSIZE 256 170 #define CONFIG_SYS_MAXARGS 16 171 #define CONFIG_SYS_LONGHELP 172 #define CONFIG_CMDLINE_EDITING 173 #define CONFIG_AUTO_COMPLETE 174 175 /* 176 * Size of malloc() pool 177 */ 178 #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000) 179 180 /* Defines for SPL */ 181 #define CONFIG_SPL_FRAMEWORK 182 #define CONFIG_SPL_TEXT_BASE 0x300000 183 #define CONFIG_SPL_MAX_SIZE 0x010000 184 #define CONFIG_SPL_STACK 0x310000 185 186 #define CONFIG_SYS_MONITOR_LEN 0x80000 187 188 #ifdef CONFIG_SYS_USE_MMC 189 190 #define CONFIG_SPL_BSS_START_ADDR 0x70000000 191 #define CONFIG_SPL_BSS_MAX_SIZE 0x00080000 192 #define CONFIG_SYS_SPL_MALLOC_START 0x70080000 193 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00080000 194 195 #define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/arm926ejs/u-boot-spl.lds 196 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x400 197 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200 198 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 199 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 200 201 #elif CONFIG_SYS_USE_NANDFLASH 202 #define CONFIG_SPL_NAND_DRIVERS 203 #define CONFIG_SPL_NAND_BASE 204 #define CONFIG_SPL_NAND_ECC 205 #define CONFIG_SPL_NAND_SOFTECC 206 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000 207 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000 208 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 209 210 #define CONFIG_SYS_NAND_PAGE_SIZE 0x800 211 #define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000 212 #define CONFIG_SYS_NAND_PAGE_COUNT 64 213 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS 214 #define CONFIG_SYS_NAND_ECCSIZE 256 215 #define CONFIG_SYS_NAND_ECCBYTES 3 216 #define CONFIG_SYS_NAND_OOBSIZE 64 217 #define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \ 218 48, 49, 50, 51, 52, 53, 54, 55, \ 219 56, 57, 58, 59, 60, 61, 62, 63, } 220 #endif 221 222 #define CONFIG_SPL_ATMEL_SIZE 223 #define CONFIG_SYS_MASTER_CLOCK 132096000 224 #define CONFIG_SYS_AT91_PLLA 0x20c73f03 225 #define CONFIG_SYS_MCKR 0x1301 226 #define CONFIG_SYS_MCKR_CSS 0x1302 227 228 #endif 229