1 /* 2 * (C) Copyright 2007-2008 3 * Stelian Pop <stelian@popies.net> 4 * Lead Tech Design <www.leadtechdesign.com> 5 * 6 * Configuation settings for the AT91SAM9M10G45EK board(and AT91SAM9G45EKES). 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11 #ifndef __CONFIG_H 12 #define __CONFIG_H 13 14 #include <asm/hardware.h> 15 16 #define CONFIG_SYS_TEXT_BASE 0x73f00000 17 18 #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ 19 20 /* ARM asynchronous clock */ 21 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 22 #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */ 23 24 #define CONFIG_AT91SAM9M10G45EK 25 26 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 27 #define CONFIG_SETUP_MEMORY_TAGS 28 #define CONFIG_INITRD_TAG 29 #define CONFIG_SKIP_LOWLEVEL_INIT 30 #define CONFIG_BOARD_EARLY_INIT_F 31 #define CONFIG_DISPLAY_CPUINFO 32 33 /* general purpose I/O */ 34 #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ 35 #define CONFIG_AT91_GPIO 36 #define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */ 37 38 /* serial console */ 39 #define CONFIG_ATMEL_USART 40 #define CONFIG_USART_BASE ATMEL_BASE_DBGU 41 #define CONFIG_USART_ID ATMEL_ID_SYS 42 43 /* LCD */ 44 #define CONFIG_LCD 45 #define LCD_BPP LCD_COLOR8 46 #define CONFIG_LCD_LOGO 47 #undef LCD_TEST_PATTERN 48 #define CONFIG_LCD_INFO 49 #define CONFIG_LCD_INFO_BELOW_LOGO 50 #define CONFIG_SYS_WHITE_ON_BLACK 51 #define CONFIG_ATMEL_LCD 52 #define CONFIG_ATMEL_LCD_RGB565 53 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 54 /* board specific(not enough SRAM) */ 55 #define CONFIG_AT91SAM9G45_LCD_BASE 0x73E00000 56 57 /* LED */ 58 #define CONFIG_AT91_LED 59 #define CONFIG_RED_LED AT91_PIN_PD31 /* this is the user1 led */ 60 #define CONFIG_GREEN_LED AT91_PIN_PD0 /* this is the user2 led */ 61 62 63 /* 64 * BOOTP options 65 */ 66 #define CONFIG_BOOTP_BOOTFILESIZE 67 #define CONFIG_BOOTP_BOOTPATH 68 #define CONFIG_BOOTP_GATEWAY 69 #define CONFIG_BOOTP_HOSTNAME 70 71 /* 72 * Command line configuration. 73 */ 74 75 /* No NOR flash */ 76 #define CONFIG_SYS_NO_FLASH 77 #define CONFIG_CMD_NAND 78 79 /* SDRAM */ 80 #define CONFIG_NR_DRAM_BANKS 1 81 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS6 82 #define CONFIG_SYS_SDRAM_SIZE 0x08000000 83 84 #define CONFIG_SYS_INIT_SP_ADDR \ 85 (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE) 86 87 /* NAND flash */ 88 #ifdef CONFIG_CMD_NAND 89 #define CONFIG_NAND_ATMEL 90 #define CONFIG_SYS_MAX_NAND_DEVICE 1 91 #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 92 #define CONFIG_SYS_NAND_DBW_8 93 /* our ALE is AD21 */ 94 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) 95 /* our CLE is AD22 */ 96 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) 97 #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 98 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC8 99 100 #endif 101 102 /* MMC */ 103 104 #ifdef CONFIG_CMD_MMC 105 #define CONFIG_MMC 106 #define CONFIG_GENERIC_MMC 107 #define CONFIG_GENERIC_ATMEL_MCI 108 #endif 109 110 #if defined(CONFIG_CMD_USB) || defined(CONFIG_CMD_MMC) 111 #define CONFIG_DOS_PARTITION 112 #endif 113 114 /* Ethernet */ 115 #define CONFIG_MACB 116 #define CONFIG_RMII 117 #define CONFIG_NET_RETRY_COUNT 20 118 #define CONFIG_RESET_PHY_R 119 #define CONFIG_AT91_WANTS_COMMON_PHY 120 121 /* USB */ 122 #define CONFIG_USB_EHCI 123 #define CONFIG_USB_EHCI_ATMEL 124 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 2 125 126 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ 127 128 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 129 #define CONFIG_SYS_MEMTEST_END 0x23e00000 130 131 #ifdef CONFIG_SYS_USE_NANDFLASH 132 /* bootstrap + u-boot + env in nandflash */ 133 #define CONFIG_ENV_IS_IN_NAND 134 #define CONFIG_ENV_OFFSET 0xc0000 135 #define CONFIG_ENV_OFFSET_REDUND 0x100000 136 #define CONFIG_ENV_SIZE 0x20000 137 138 #define CONFIG_BOOTCOMMAND \ 139 "nand read 0x70000000 0x200000 0x300000;" \ 140 "bootm 0x70000000" 141 #define CONFIG_BOOTARGS \ 142 "console=ttyS0,115200 earlyprintk " \ 143 "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \ 144 "256k(env),256k(env_redundant),256k(spare)," \ 145 "512k(dtb),6M(kernel)ro,-(rootfs) " \ 146 "root=/dev/mtdblock7 rw rootfstype=jffs2" 147 #elif CONFIG_SYS_USE_MMC 148 /* bootstrap + u-boot + env + linux in mmc */ 149 #define FAT_ENV_INTERFACE "mmc" 150 /* 151 * We don't specify the part number, if device 0 has partition table, it means 152 * the first partition; it no partition table, then take whole device as a 153 * FAT file system. 154 */ 155 #define FAT_ENV_DEVICE_AND_PART "0" 156 #define FAT_ENV_FILE "uboot.env" 157 #define CONFIG_ENV_IS_IN_FAT 158 #define CONFIG_FAT_WRITE 159 #define CONFIG_ENV_SIZE 0x4000 160 161 #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ 162 "mtdparts=atmel_nand:" \ 163 "8M(bootstrap/uboot/kernel)ro,-(rootfs) " \ 164 "root=/dev/mmcblk0p2 rw rootwait" 165 #define CONFIG_BOOTCOMMAND "fatload mmc 0:1 0x71000000 dtb; " \ 166 "fatload mmc 0:1 0x72000000 zImage; " \ 167 "bootz 0x72000000 - 0x71000000" 168 #endif 169 170 #define CONFIG_BAUDRATE 115200 171 172 #define CONFIG_SYS_CBSIZE 256 173 #define CONFIG_SYS_MAXARGS 16 174 #define CONFIG_SYS_LONGHELP 175 #define CONFIG_CMDLINE_EDITING 176 #define CONFIG_AUTO_COMPLETE 177 178 /* 179 * Size of malloc() pool 180 */ 181 #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000) 182 183 /* Defines for SPL */ 184 #define CONFIG_SPL_FRAMEWORK 185 #define CONFIG_SPL_TEXT_BASE 0x300000 186 #define CONFIG_SPL_MAX_SIZE 0x010000 187 #define CONFIG_SPL_STACK 0x310000 188 189 #define CONFIG_SYS_MONITOR_LEN 0x80000 190 191 #ifdef CONFIG_SYS_USE_MMC 192 193 #define CONFIG_SPL_BSS_START_ADDR 0x70000000 194 #define CONFIG_SPL_BSS_MAX_SIZE 0x00080000 195 #define CONFIG_SYS_SPL_MALLOC_START 0x70080000 196 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00080000 197 198 #define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/arm926ejs/u-boot-spl.lds 199 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x400 200 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200 201 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 202 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 203 204 #elif CONFIG_SYS_USE_NANDFLASH 205 #define CONFIG_SPL_NAND_DRIVERS 206 #define CONFIG_SPL_NAND_BASE 207 #define CONFIG_SPL_NAND_ECC 208 #define CONFIG_SPL_NAND_SOFTECC 209 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000 210 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000 211 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 212 213 #define CONFIG_SYS_NAND_PAGE_SIZE 0x800 214 #define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000 215 #define CONFIG_SYS_NAND_PAGE_COUNT 64 216 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS 217 #define CONFIG_SYS_NAND_ECCSIZE 256 218 #define CONFIG_SYS_NAND_ECCBYTES 3 219 #define CONFIG_SYS_NAND_OOBSIZE 64 220 #define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \ 221 48, 49, 50, 51, 52, 53, 54, 55, \ 222 56, 57, 58, 59, 60, 61, 62, 63, } 223 #endif 224 225 #define CONFIG_SPL_ATMEL_SIZE 226 #define CONFIG_SYS_MASTER_CLOCK 132096000 227 #define CONFIG_SYS_AT91_PLLA 0x20c73f03 228 #define CONFIG_SYS_MCKR 0x1301 229 #define CONFIG_SYS_MCKR_CSS 0x1302 230 231 #endif 232