1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * (C) Copyright 2007-2008
4  * Stelian Pop <stelian@popies.net>
5  * Lead Tech Design <www.leadtechdesign.com>
6  *
7  * Configuation settings for the AT91SAM9261EK board.
8  */
9 
10 #ifndef __CONFIG_H
11 #define __CONFIG_H
12 
13 /* ARM asynchronous clock */
14 #define CONFIG_SYS_AT91_SLOW_CLOCK	32768		/* slow clock xtal */
15 #define CONFIG_SYS_AT91_MAIN_CLOCK	18432000	/* 18.432 MHz crystal */
16 
17 #ifdef CONFIG_AT91SAM9G10
18 #define CONFIG_AT91SAM9G10EK		/* It's an Atmel AT91SAM9G10 EK*/
19 #else
20 #define CONFIG_AT91SAM9261EK		/* It's an Atmel AT91SAM9261 EK*/
21 #endif
22 
23 #include <asm/hardware.h>
24 
25 #define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
26 #define CONFIG_SETUP_MEMORY_TAGS
27 #define CONFIG_INITRD_TAG
28 
29 #define CONFIG_SKIP_LOWLEVEL_INIT
30 
31 #define CONFIG_ATMEL_LEGACY
32 
33 /*
34  * Hardware drivers
35  */
36 
37 /* LCD */
38 #define LCD_BPP				LCD_COLOR8
39 #define CONFIG_LCD_LOGO
40 #undef LCD_TEST_PATTERN
41 #define CONFIG_LCD_INFO
42 #define CONFIG_LCD_INFO_BELOW_LOGO
43 #define CONFIG_ATMEL_LCD
44 #ifdef CONFIG_AT91SAM9261EK
45 #define CONFIG_ATMEL_LCD_BGR555
46 #endif
47 
48 /*
49  * BOOTP options
50  */
51 #define CONFIG_BOOTP_BOOTFILESIZE
52 
53 /* SDRAM */
54 #define CONFIG_SYS_SDRAM_BASE		0x20000000
55 #define CONFIG_SYS_SDRAM_SIZE		0x04000000
56 #define CONFIG_SYS_INIT_SP_ADDR \
57 	(ATMEL_BASE_SRAM + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
58 
59 /* NAND flash */
60 #ifdef CONFIG_CMD_NAND
61 #define CONFIG_SYS_MAX_NAND_DEVICE		1
62 #define CONFIG_SYS_NAND_BASE			0x40000000
63 #define CONFIG_SYS_NAND_DBW_8
64 /* our ALE is AD22 */
65 #define CONFIG_SYS_NAND_MASK_ALE		(1 << 22)
66 /* our CLE is AD21 */
67 #define CONFIG_SYS_NAND_MASK_CLE		(1 << 21)
68 #define CONFIG_SYS_NAND_ENABLE_PIN		AT91_PIN_PC14
69 #define CONFIG_SYS_NAND_READY_PIN		AT91_PIN_PC15
70 
71 #endif
72 
73 /* Ethernet */
74 #define CONFIG_DRIVER_DM9000
75 #define CONFIG_DM9000_BASE		0x30000000
76 #define DM9000_IO			CONFIG_DM9000_BASE
77 #define DM9000_DATA			(CONFIG_DM9000_BASE + 4)
78 #define CONFIG_DM9000_USE_16BIT
79 #define CONFIG_DM9000_NO_SROM
80 #define CONFIG_NET_RETRY_COUNT		20
81 #define CONFIG_RESET_PHY_R
82 
83 /* USB */
84 #define CONFIG_USB_ATMEL
85 #define CONFIG_USB_ATMEL_CLK_SEL_PLLB
86 #define CONFIG_USB_OHCI_NEW
87 #define CONFIG_SYS_USB_OHCI_CPU_INIT
88 #define CONFIG_SYS_USB_OHCI_REGS_BASE		0x00500000	/* AT91SAM9261_UHP_BASE */
89 #ifdef CONFIG_AT91SAM9G10EK
90 #define CONFIG_SYS_USB_OHCI_SLOT_NAME		"at91sam9g10"
91 #else
92 #define CONFIG_SYS_USB_OHCI_SLOT_NAME		"at91sam9261"
93 #endif
94 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	2
95 
96 #define CONFIG_SYS_LOAD_ADDR			0x22000000	/* load address */
97 
98 #define CONFIG_SYS_MEMTEST_START		CONFIG_SYS_SDRAM_BASE
99 #define CONFIG_SYS_MEMTEST_END			0x23e00000
100 
101 #ifdef CONFIG_SYS_USE_DATAFLASH_CS0
102 
103 /* bootstrap + u-boot + env + linux in dataflash on CS0 */
104 #define CONFIG_ENV_OFFSET	0x4200
105 #define CONFIG_ENV_SIZE		0x4200
106 #define CONFIG_ENV_SECT_SIZE	0x210
107 #define CONFIG_BOOTCOMMAND	"sf probe 0; " \
108 				"sf read 0x22000000 0x84000 0x294000; " \
109 				"bootm 0x22000000"
110 
111 #elif CONFIG_SYS_USE_DATAFLASH_CS3
112 
113 /* bootstrap + u-boot + env + linux in dataflash on CS3 */
114 #define CONFIG_ENV_OFFSET	0x4200
115 #define CONFIG_ENV_SIZE		0x4200
116 #define CONFIG_ENV_SECT_SIZE	0x210
117 #define CONFIG_BOOTCOMMAND	"sf probe 0:3; " \
118 				"sf read 0x22000000 0x84000 0x294000; " \
119 				"bootm 0x22000000"
120 
121 #else /* CONFIG_SYS_USE_NANDFLASH */
122 
123 /* bootstrap + u-boot + env + linux in nandflash */
124 #define CONFIG_ENV_OFFSET		0x140000
125 #define CONFIG_ENV_OFFSET_REDUND	0x100000
126 #define CONFIG_ENV_SIZE		0x20000		/* 1 sector = 128 kB */
127 #define CONFIG_BOOTCOMMAND	"nand read 0x22000000 0x200000 0x300000; bootm"
128 #endif
129 
130 /*
131  * Size of malloc() pool
132  */
133 #define CONFIG_SYS_MALLOC_LEN		ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
134 
135 #endif
136