1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * (C) Copyright 2007-2008 4 * Stelian Pop <stelian@popies.net> 5 * Lead Tech Design <www.leadtechdesign.com> 6 * 7 * Configuation settings for the AT91SAM9261EK board. 8 */ 9 10 #ifndef __CONFIG_H 11 #define __CONFIG_H 12 13 /* ARM asynchronous clock */ 14 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ 15 #define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */ 16 17 #ifdef CONFIG_AT91SAM9G10 18 #define CONFIG_AT91SAM9G10EK /* It's an Atmel AT91SAM9G10 EK*/ 19 #else 20 #define CONFIG_AT91SAM9261EK /* It's an Atmel AT91SAM9261 EK*/ 21 #endif 22 23 #include <asm/hardware.h> 24 25 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 26 #define CONFIG_SETUP_MEMORY_TAGS 27 #define CONFIG_INITRD_TAG 28 29 #define CONFIG_SKIP_LOWLEVEL_INIT 30 31 #define CONFIG_ATMEL_LEGACY 32 33 /* 34 * Hardware drivers 35 */ 36 37 /* LCD */ 38 #define LCD_BPP LCD_COLOR8 39 #define CONFIG_LCD_LOGO 40 #undef LCD_TEST_PATTERN 41 #define CONFIG_LCD_INFO 42 #define CONFIG_LCD_INFO_BELOW_LOGO 43 #define CONFIG_ATMEL_LCD 44 #ifdef CONFIG_AT91SAM9261EK 45 #define CONFIG_ATMEL_LCD_BGR555 46 #endif 47 48 /* 49 * BOOTP options 50 */ 51 #define CONFIG_BOOTP_BOOTFILESIZE 52 53 /* SDRAM */ 54 #define CONFIG_NR_DRAM_BANKS 1 55 #define CONFIG_SYS_SDRAM_BASE 0x20000000 56 #define CONFIG_SYS_SDRAM_SIZE 0x04000000 57 #define CONFIG_SYS_INIT_SP_ADDR \ 58 (ATMEL_BASE_SRAM + 16 * 1024 - GENERATED_GBL_DATA_SIZE) 59 60 /* NAND flash */ 61 #ifdef CONFIG_CMD_NAND 62 #define CONFIG_SYS_MAX_NAND_DEVICE 1 63 #define CONFIG_SYS_NAND_BASE 0x40000000 64 #define CONFIG_SYS_NAND_DBW_8 65 /* our ALE is AD22 */ 66 #define CONFIG_SYS_NAND_MASK_ALE (1 << 22) 67 /* our CLE is AD21 */ 68 #define CONFIG_SYS_NAND_MASK_CLE (1 << 21) 69 #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 70 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC15 71 72 #endif 73 74 /* Ethernet */ 75 #define CONFIG_DRIVER_DM9000 76 #define CONFIG_DM9000_BASE 0x30000000 77 #define DM9000_IO CONFIG_DM9000_BASE 78 #define DM9000_DATA (CONFIG_DM9000_BASE + 4) 79 #define CONFIG_DM9000_USE_16BIT 80 #define CONFIG_DM9000_NO_SROM 81 #define CONFIG_NET_RETRY_COUNT 20 82 #define CONFIG_RESET_PHY_R 83 84 /* USB */ 85 #define CONFIG_USB_ATMEL 86 #define CONFIG_USB_ATMEL_CLK_SEL_PLLB 87 #define CONFIG_USB_OHCI_NEW 88 #define CONFIG_SYS_USB_OHCI_CPU_INIT 89 #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9261_UHP_BASE */ 90 #ifdef CONFIG_AT91SAM9G10EK 91 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9g10" 92 #else 93 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9261" 94 #endif 95 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 96 97 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ 98 99 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 100 #define CONFIG_SYS_MEMTEST_END 0x23e00000 101 102 #ifdef CONFIG_SYS_USE_DATAFLASH_CS0 103 104 /* bootstrap + u-boot + env + linux in dataflash on CS0 */ 105 #define CONFIG_ENV_OFFSET 0x4200 106 #define CONFIG_ENV_SIZE 0x4200 107 #define CONFIG_ENV_SECT_SIZE 0x210 108 #define CONFIG_ENV_SPI_MAX_HZ 15000000 109 #define CONFIG_BOOTCOMMAND "sf probe 0; " \ 110 "sf read 0x22000000 0x84000 0x294000; " \ 111 "bootm 0x22000000" 112 113 #elif CONFIG_SYS_USE_DATAFLASH_CS3 114 115 /* bootstrap + u-boot + env + linux in dataflash on CS3 */ 116 #define CONFIG_ENV_OFFSET 0x4200 117 #define CONFIG_ENV_SIZE 0x4200 118 #define CONFIG_ENV_SECT_SIZE 0x210 119 #define CONFIG_ENV_SPI_MAX_HZ 15000000 120 #define CONFIG_BOOTCOMMAND "sf probe 0:3; " \ 121 "sf read 0x22000000 0x84000 0x294000; " \ 122 "bootm 0x22000000" 123 124 #else /* CONFIG_SYS_USE_NANDFLASH */ 125 126 /* bootstrap + u-boot + env + linux in nandflash */ 127 #define CONFIG_ENV_OFFSET 0x140000 128 #define CONFIG_ENV_OFFSET_REDUND 0x100000 129 #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ 130 #define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm" 131 #endif 132 133 /* 134 * Size of malloc() pool 135 */ 136 #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000) 137 138 #endif 139