1 /* 2 * (C) Copyright 2007-2008 3 * Stelian Pop <stelian@popies.net> 4 * Lead Tech Design <www.leadtechdesign.com> 5 * 6 * Configuation settings for the AT91SAM9261EK board. 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11 #ifndef __CONFIG_H 12 #define __CONFIG_H 13 14 /* ARM asynchronous clock */ 15 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ 16 #define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */ 17 18 #ifdef CONFIG_AT91SAM9G10 19 #define CONFIG_AT91SAM9G10EK /* It's an Atmel AT91SAM9G10 EK*/ 20 #else 21 #define CONFIG_AT91SAM9261EK /* It's an Atmel AT91SAM9261 EK*/ 22 #endif 23 24 #include <asm/hardware.h> 25 26 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 27 #define CONFIG_SETUP_MEMORY_TAGS 28 #define CONFIG_INITRD_TAG 29 30 #define CONFIG_SKIP_LOWLEVEL_INIT 31 32 #define CONFIG_ATMEL_LEGACY 33 #define CONFIG_SYS_TEXT_BASE 0x21f00000 34 35 /* 36 * Hardware drivers 37 */ 38 39 /* gpio */ 40 #define CONFIG_AT91_GPIO 41 #define CONFIG_AT91_GPIO_PULLUP 1 42 43 /* serial console */ 44 #define CONFIG_ATMEL_USART 45 #define CONFIG_USART_BASE ATMEL_BASE_DBGU 46 #define CONFIG_USART_ID ATMEL_ID_SYS 47 48 /* LCD */ 49 #define LCD_BPP LCD_COLOR8 50 #define CONFIG_LCD_LOGO 51 #undef LCD_TEST_PATTERN 52 #define CONFIG_LCD_INFO 53 #define CONFIG_LCD_INFO_BELOW_LOGO 54 #define CONFIG_ATMEL_LCD 55 #ifdef CONFIG_AT91SAM9261EK 56 #define CONFIG_ATMEL_LCD_BGR555 57 #endif 58 59 /* LED */ 60 #define CONFIG_AT91_LED 61 #define CONFIG_RED_LED AT91_PIN_PA23 /* this is the power led */ 62 #define CONFIG_GREEN_LED AT91_PIN_PA13 /* this is the user1 led */ 63 #define CONFIG_YELLOW_LED AT91_PIN_PA14 /* this is the user2 led */ 64 65 66 /* 67 * BOOTP options 68 */ 69 #define CONFIG_BOOTP_BOOTFILESIZE 70 #define CONFIG_BOOTP_BOOTPATH 71 #define CONFIG_BOOTP_GATEWAY 72 #define CONFIG_BOOTP_HOSTNAME 73 74 /* SDRAM */ 75 #define CONFIG_NR_DRAM_BANKS 1 76 #define CONFIG_SYS_SDRAM_BASE 0x20000000 77 #define CONFIG_SYS_SDRAM_SIZE 0x04000000 78 #define CONFIG_SYS_INIT_SP_ADDR \ 79 (ATMEL_BASE_SRAM + 0x1000 - GENERATED_GBL_DATA_SIZE) 80 81 /* DataFlash */ 82 #define CONFIG_ATMEL_DATAFLASH_SPI 83 #define CONFIG_HAS_DATAFLASH 84 #define CONFIG_SYS_MAX_DATAFLASH_BANKS 2 85 #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ 86 #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000 /* CS3 */ 87 #define AT91_SPI_CLK 15000000 88 #define DATAFLASH_TCSS (0x1a << 16) 89 #define DATAFLASH_TCHS (0x1 << 24) 90 91 /* NAND flash */ 92 #ifdef CONFIG_CMD_NAND 93 #define CONFIG_NAND_ATMEL 94 #define CONFIG_SYS_MAX_NAND_DEVICE 1 95 #define CONFIG_SYS_NAND_BASE 0x40000000 96 #define CONFIG_SYS_NAND_DBW_8 97 /* our ALE is AD22 */ 98 #define CONFIG_SYS_NAND_MASK_ALE (1 << 22) 99 /* our CLE is AD21 */ 100 #define CONFIG_SYS_NAND_MASK_CLE (1 << 21) 101 #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 102 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC15 103 104 #endif 105 106 /* Ethernet */ 107 #define CONFIG_DRIVER_DM9000 108 #define CONFIG_DM9000_BASE 0x30000000 109 #define DM9000_IO CONFIG_DM9000_BASE 110 #define DM9000_DATA (CONFIG_DM9000_BASE + 4) 111 #define CONFIG_DM9000_USE_16BIT 112 #define CONFIG_DM9000_NO_SROM 113 #define CONFIG_NET_RETRY_COUNT 20 114 #define CONFIG_RESET_PHY_R 115 116 /* USB */ 117 #define CONFIG_USB_ATMEL 118 #define CONFIG_USB_ATMEL_CLK_SEL_PLLB 119 #define CONFIG_USB_OHCI_NEW 120 #define CONFIG_SYS_USB_OHCI_CPU_INIT 121 #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9261_UHP_BASE */ 122 #ifdef CONFIG_AT91SAM9G10EK 123 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9g10" 124 #else 125 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9261" 126 #endif 127 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 128 129 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ 130 131 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 132 #define CONFIG_SYS_MEMTEST_END 0x23e00000 133 134 #ifdef CONFIG_SYS_USE_DATAFLASH_CS0 135 136 /* bootstrap + u-boot + env + linux in dataflash on CS0 */ 137 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400) 138 #define CONFIG_ENV_OFFSET 0x4200 139 #define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET) 140 #define CONFIG_ENV_SIZE 0x4200 141 #define CONFIG_BOOTCOMMAND "cp.b 0xC0084000 0x22000000 0x210000; bootm" 142 #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ 143 "root=/dev/mtdblock0 " \ 144 "mtdparts=atmel_nand:-(root) " \ 145 "rw rootfstype=jffs2" 146 147 #elif CONFIG_SYS_USE_DATAFLASH_CS3 148 149 /* bootstrap + u-boot + env + linux in dataflash on CS3 */ 150 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 + 0x8400) 151 #define CONFIG_ENV_OFFSET 0x4200 152 #define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 + CONFIG_ENV_OFFSET) 153 #define CONFIG_ENV_SIZE 0x4200 154 #define CONFIG_BOOTCOMMAND "cp.b 0xD0084000 0x22000000 0x210000; bootm" 155 #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ 156 "root=/dev/mtdblock0 " \ 157 "mtdparts=atmel_nand:-(root) " \ 158 "rw rootfstype=jffs2" 159 160 #else /* CONFIG_SYS_USE_NANDFLASH */ 161 162 /* bootstrap + u-boot + env + linux in nandflash */ 163 #define CONFIG_ENV_OFFSET 0xc0000 164 #define CONFIG_ENV_OFFSET_REDUND 0x100000 165 #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ 166 #define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm" 167 #define CONFIG_BOOTARGS \ 168 "console=ttyS0,115200 earlyprintk " \ 169 "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \ 170 "256k(env),256k(env_redundant),256k(spare)," \ 171 "512k(dtb),6M(kernel)ro,-(rootfs) " \ 172 "root=/dev/mtdblock7 rw rootfstype=jffs2" 173 #endif 174 175 #define CONFIG_SYS_CBSIZE 256 176 #define CONFIG_SYS_MAXARGS 16 177 #define CONFIG_SYS_LONGHELP 178 #define CONFIG_CMDLINE_EDITING 179 #define CONFIG_AUTO_COMPLETE 180 181 /* 182 * Size of malloc() pool 183 */ 184 #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000) 185 186 #endif 187