1 /*
2  * Configuration settings for the Sentec Cobra Board.
3  *
4  * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de>
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 
9 /*
10  * configuration for ASTRO "Urmel" board.
11  * Originating from Cobra5272 configuration, messed up by
12  * Wolfgang Wegner <w.wegner@astro-kom.de>
13  * Please do not bother the original author with bug reports
14  * concerning this file.
15  */
16 
17 #ifndef _CONFIG_ASTRO_MCF5373L_H
18 #define _CONFIG_ASTRO_MCF5373L_H
19 
20 #include <linux/stringify.h>
21 
22 /*
23  * set the card type to actually compile for; either of
24  * the possibilities listed below has to be used!
25  */
26 #define CONFIG_ASTRO_V532	1
27 
28 #if CONFIG_ASTRO_V532
29 #define ASTRO_ID	0xF8
30 #elif CONFIG_ASTRO_V512
31 #define ASTRO_ID	0xFA
32 #elif CONFIG_ASTRO_TWIN7S2
33 #define ASTRO_ID	0xF9
34 #elif CONFIG_ASTRO_V912
35 #define ASTRO_ID	0xFC
36 #elif CONFIG_ASTRO_COFDMDUOS2
37 #define ASTRO_ID	0xFB
38 #else
39 #error No card type defined!
40 #endif
41 
42 #define CONFIG_ASTRO5373L		/* define board type */
43 
44 /* Command line configuration */
45 /*
46  * CONFIG_RAM defines if u-boot is loaded via BDM (or started from
47  * a different bootloader that has already performed RAM setup) or
48  * started directly from flash, which is the regular case for production
49  * boards.
50  */
51 #ifdef CONFIG_RAM
52 #define CONFIG_MONITOR_IS_IN_RAM
53 #define CONFIG_SYS_TEXT_BASE		0x40020000
54 #define ENABLE_JFFS	0
55 #else
56 #define CONFIG_SYS_TEXT_BASE		0x00000000
57 #define ENABLE_JFFS	1
58 #endif
59 
60 /* Define which commands should be available at u-boot command prompt */
61 
62 #define CONFIG_CMD_DATE
63 #if ENABLE_JFFS
64 #define CONFIG_CMD_JFFS2
65 #endif
66 #define CONFIG_CMD_REGINFO
67 #define CONFIG_CMD_FPGA_LOADMK
68 #define CONFIG_CMDLINE_EDITING
69 
70 #define CONFIG_MCFRTC
71 #undef RTC_DEBUG
72 
73 /* Timer */
74 #define CONFIG_MCFTMR
75 #undef CONFIG_MCFPIT
76 
77 /* I2C */
78 #define CONFIG_SYS_I2C
79 #define CONFIG_SYS_I2C_FSL
80 #define CONFIG_SYS_FSL_I2C_SPEED	80000
81 #define CONFIG_SYS_FSL_I2C_SLAVE	0x7F
82 #define CONFIG_SYS_FSL_I2C_OFFSET	0x58000
83 #define CONFIG_SYS_IMMR			CONFIG_SYS_MBAR
84 
85 /*
86  * Defines processor clock - important for correct timings concerning serial
87  * interface etc.
88  */
89 
90 #define CONFIG_SYS_CLK			80000000
91 #define CONFIG_SYS_CPU_CLK		(CONFIG_SYS_CLK * 3)
92 #define CONFIG_SYS_SDRAM_SIZE		32		/* SDRAM size in MB */
93 
94 #define CONFIG_SYS_CORE_SRAM_SIZE	0x8000
95 #define CONFIG_SYS_CORE_SRAM		0x80000000
96 
97 #define CONFIG_SYS_UNIFY_CACHE
98 
99 /*
100  * Define baudrate for UART1 (console output, tftp, ...)
101  * default value of CONFIG_BAUDRATE for Sentec board: 19200 baud
102  * CONFIG_SYS_BAUDRATE_TABLE defines values that can be selected
103  * in u-boot command interface
104  */
105 
106 #define CONFIG_MCFUART
107 #define CONFIG_SYS_UART_PORT		(2)
108 #define CONFIG_SYS_UART2_ALT3_GPIO
109 
110 /*
111  * Watchdog configuration; Watchdog is disabled for running from RAM
112  * and set to highest possible value else. Beware there is no check
113  * in the watchdog code to validate the timeout value set here!
114  */
115 
116 #ifndef CONFIG_MONITOR_IS_IN_RAM
117 #define CONFIG_WATCHDOG
118 #define CONFIG_WATCHDOG_TIMEOUT 3355	/* timeout in milliseconds */
119 #endif
120 
121 /*
122  * Configuration for environment
123  * Environment is located in the last sector of the flash
124  */
125 
126 #ifndef CONFIG_MONITOR_IS_IN_RAM
127 #define CONFIG_ENV_OFFSET		0x1FF8000
128 #define CONFIG_ENV_SECT_SIZE		0x8000
129 #define CONFIG_ENV_IS_IN_FLASH		1
130 #else
131 /*
132  * environment in RAM - This is used to use a single PC-based application
133  * to load an image, load U-Boot, load an environment and then start U-Boot
134  * to execute the commands from the environment. Feedback is done via setting
135  * and reading memory locations.
136  */
137 #define CONFIG_ENV_ADDR		0x40060000
138 #define CONFIG_ENV_SECT_SIZE	0x8000
139 #define CONFIG_ENV_IS_IN_FLASH	1
140 #endif
141 
142 /* here we put our FPGA configuration... */
143 #define CONFIG_MISC_INIT_R	1
144 
145 /* Define user parameters that have to be customized most likely */
146 
147 /* AUTOBOOT settings - booting images automatically by u-boot after power on */
148 
149 /*
150  * The following settings will be contained in the environment block ; if you
151  * want to use a neutral environment all those settings can be manually set in
152  * u-boot: 'set' command
153  */
154 
155 #define CONFIG_EXTRA_ENV_SETTINGS			\
156 	"loaderversion=11\0"				\
157 	"card_id="__stringify(ASTRO_ID)"\0"			\
158 	"alterafile=0\0"				\
159 	"xilinxfile=0\0"				\
160 	"xilinxload=imxtract 0x540000 $xilinxfile 0x41000000&&"\
161 		"fpga load 0 0x41000000 $filesize\0" \
162 	"alteraload=imxtract 0x6c0000 $alterafile 0x41000000&&"\
163 		"fpga load 1 0x41000000 $filesize\0" \
164 	"env_default=1\0"				\
165 	"env_check=if test $env_default -eq 1;"\
166 		" then setenv env_default 0;saveenv;fi\0"
167 
168 /*
169  * "update" is a non-standard command that has to be supplied
170  * by external update.c; This is not included in mainline because
171  * it needs non-blocking CFI routines.
172  */
173 #ifdef CONFIG_MONITOR_IS_IN_RAM
174 #define CONFIG_BOOTCOMMAND	""	/* no autoboot in this case */
175 #else
176 #if CONFIG_ASTRO_V532
177 #define CONFIG_BOOTCOMMAND	"protect off 0x80000 0x1ffffff;run env_check;"\
178 				"run xilinxload&&run alteraload&&bootm 0x80000;"\
179 				"update;reset"
180 #else
181 #define CONFIG_BOOTCOMMAND	"protect off 0x80000 0x1ffffff;run env_check;"\
182 				"run xilinxload&&bootm 0x80000;update;reset"
183 #endif
184 #endif
185 
186 /* default bootargs that are considered during boot */
187 #define CONFIG_BOOTARGS		" console=ttyS2,115200 rootfstype=romfs"\
188 				" loaderversion=$loaderversion"
189 
190 /* default RAM address for user programs */
191 #define CONFIG_SYS_LOAD_ADDR	0x20000
192 
193 #define CONFIG_SYS_LONGHELP
194 
195 #if (CONFIG_COMMANDS & CONFIG_CMD_KGDB)
196 #define CONFIG_SYS_CBSIZE		1024
197 #else
198 #define CONFIG_SYS_CBSIZE		256
199 #endif
200 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
201 #define CONFIG_SYS_MAXARGS		16
202 #define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
203 
204 #define CONFIG_FPGA_COUNT	1
205 #define CONFIG_FPGA
206 #define	CONFIG_FPGA_XILINX
207 #define	CONFIG_FPGA_SPARTAN3
208 #define CONFIG_FPGA_ALTERA
209 #define CONFIG_FPGA_CYCLON2
210 #define CONFIG_SYS_FPGA_PROG_FEEDBACK
211 #define CONFIG_SYS_FPGA_WAIT		1000
212 
213 /* End of user parameters to be customized */
214 
215 /* Defines memory range for test */
216 
217 #define CONFIG_SYS_MEMTEST_START	0x40020000
218 #define CONFIG_SYS_MEMTEST_END		0x41ffffff
219 
220 /*
221  * Low Level Configuration Settings
222  * (address mappings, register initial values, etc.)
223  * You should know what you are doing if you make changes here.
224  */
225 
226 /* Base register address */
227 
228 #define CONFIG_SYS_MBAR		0xFC000000	/* Register Base Addrs */
229 
230 /* System Conf. Reg. & System Protection Reg. */
231 
232 #define CONFIG_SYS_SCR		0x0003;
233 #define CONFIG_SYS_SPR		0xffff;
234 
235 /*
236  * Definitions for initial stack pointer and data area (in internal SRAM)
237  */
238 #define CONFIG_SYS_INIT_RAM_ADDR	0x80000000
239 #define CONFIG_SYS_INIT_RAM_SIZE		0x8000
240 #define CONFIG_SYS_INIT_RAM_CTRL	0x221
241 #define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - \
242 					 GENERATED_GBL_DATA_SIZE)
243 #define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
244 
245 /*
246  * Start addresses for the final memory configuration
247  * (Set up by the startup code)
248  * for MCF5373, the allowable range is 0x40000000 to 0x7FF00000
249  */
250 #define CONFIG_SYS_SDRAM_BASE		0x40000000
251 
252 /*
253  * Chipselect bank definitions
254  *
255  * CS0 - Flash 32MB (first 16MB)
256  * CS1 - Flash 32MB (second half)
257  * CS2 - FPGA
258  * CS3 - FPGA
259  * CS4 - unused
260  * CS5 - unused
261  */
262 #define CONFIG_SYS_CS0_BASE		0
263 #define CONFIG_SYS_CS0_MASK		0x00ff0001
264 #define CONFIG_SYS_CS0_CTRL		0x00001fc0
265 
266 #define CONFIG_SYS_CS1_BASE		0x01000000
267 #define CONFIG_SYS_CS1_MASK		0x00ff0001
268 #define CONFIG_SYS_CS1_CTRL		0x00001fc0
269 
270 #define CONFIG_SYS_CS2_BASE		0x20000000
271 #define CONFIG_SYS_CS2_MASK		0x00ff0001
272 #define CONFIG_SYS_CS2_CTRL		0x0000fec0
273 
274 #define CONFIG_SYS_CS3_BASE		0x21000000
275 #define CONFIG_SYS_CS3_MASK		0x00ff0001
276 #define CONFIG_SYS_CS3_CTRL		0x0000fec0
277 
278 #define CONFIG_SYS_FLASH_BASE		0x00000000
279 
280 #ifdef	CONFIG_MONITOR_IS_IN_RAM
281 #define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_TEXT_BASE
282 #else
283 /* This is mainly used during relocation in start.S */
284 #define CONFIG_SYS_MONITOR_BASE		(CONFIG_SYS_FLASH_BASE + 0x400)
285 #endif
286 /* Reserve 256 kB for Monitor */
287 #define CONFIG_SYS_MONITOR_LEN		(256 << 10)
288 
289 #define CONFIG_SYS_BOOTPARAMS_LEN	(64 * 1024)
290 /* Reserve 128 kB for malloc() */
291 #define CONFIG_SYS_MALLOC_LEN		(128 << 10)
292 
293 /*
294  * For booting Linux, the board info and command line data
295  * have to be in the first 8 MB of memory, since this is
296  * the maximum mapped by the Linux kernel during initialization ??
297  */
298 #define CONFIG_SYS_BOOTMAPSZ		(CONFIG_SYS_SDRAM_BASE + \
299 						(CONFIG_SYS_SDRAM_SIZE << 20))
300 
301 /* FLASH organization */
302 #define CONFIG_SYS_MAX_FLASH_BANKS	1
303 #define CONFIG_SYS_MAX_FLASH_SECT	259
304 #define CONFIG_SYS_FLASH_ERASE_TOUT	1000
305 
306 #define CONFIG_SYS_FLASH_CFI		1
307 #define CONFIG_FLASH_CFI_DRIVER		1
308 #define CONFIG_SYS_FLASH_SIZE		0x2000000
309 #define CONFIG_SYS_FLASH_PROTECTION	1
310 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE	1
311 #define CONFIG_SYS_FLASH_CFI_NONBLOCK	1
312 
313 #define LDS_BOARD_TEXT \
314 	. = DEFINED(env_offset) ? env_offset : .; \
315 	common/env_embedded.o       (.text*)
316 
317 #if ENABLE_JFFS
318 /* JFFS Partition offset set */
319 #define CONFIG_SYS_JFFS2_FIRST_BANK    0
320 #define CONFIG_SYS_JFFS2_NUM_BANKS     1
321 /* 512k reserved for u-boot */
322 #define CONFIG_SYS_JFFS2_FIRST_SECTOR  0x40
323 #endif
324 
325 /* Cache Configuration */
326 #define CONFIG_SYS_CACHELINE_SIZE	16
327 
328 #define ICACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
329 					 CONFIG_SYS_INIT_RAM_SIZE - 8)
330 #define DCACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
331 					 CONFIG_SYS_INIT_RAM_SIZE - 4)
332 #define CONFIG_SYS_ICACHE_INV		(CF_CACR_CINVA)
333 #define CONFIG_SYS_CACHE_ACR0		(CONFIG_SYS_SDRAM_BASE | \
334 					 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
335 					 CF_ACR_EN | CF_ACR_SM_ALL)
336 #define CONFIG_SYS_CACHE_ICACR		(CF_CACR_EC | CF_CACR_CINVA | \
337 					 CF_CACR_DCM_P)
338 
339 #endif	/* _CONFIG_ASTRO_MCF5373L_H */
340