1 /* 2 * Configuration settings for the Sentec Cobra Board. 3 * 4 * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de> 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 /* 10 * configuration for ASTRO "Urmel" board. 11 * Originating from Cobra5272 configuration, messed up by 12 * Wolfgang Wegner <w.wegner@astro-kom.de> 13 * Please do not bother the original author with bug reports 14 * concerning this file. 15 */ 16 17 #ifndef _CONFIG_ASTRO_MCF5373L_H 18 #define _CONFIG_ASTRO_MCF5373L_H 19 20 #include <linux/stringify.h> 21 22 /* 23 * set the card type to actually compile for; either of 24 * the possibilities listed below has to be used! 25 */ 26 #define CONFIG_ASTRO_V532 1 27 28 #if CONFIG_ASTRO_V532 29 #define ASTRO_ID 0xF8 30 #elif CONFIG_ASTRO_V512 31 #define ASTRO_ID 0xFA 32 #elif CONFIG_ASTRO_TWIN7S2 33 #define ASTRO_ID 0xF9 34 #elif CONFIG_ASTRO_V912 35 #define ASTRO_ID 0xFC 36 #elif CONFIG_ASTRO_COFDMDUOS2 37 #define ASTRO_ID 0xFB 38 #else 39 #error No card type defined! 40 #endif 41 42 #define CONFIG_ASTRO5373L /* define board type */ 43 44 /* Command line configuration */ 45 #include <config_cmd_default.h> 46 47 /* 48 * CONFIG_RAM defines if u-boot is loaded via BDM (or started from 49 * a different bootloader that has already performed RAM setup) or 50 * started directly from flash, which is the regular case for production 51 * boards. 52 */ 53 #ifdef CONFIG_RAM 54 #define CONFIG_MONITOR_IS_IN_RAM 55 #define CONFIG_SYS_TEXT_BASE 0x40020000 56 #define ENABLE_JFFS 0 57 #else 58 #define CONFIG_SYS_TEXT_BASE 0x00000000 59 #define ENABLE_JFFS 1 60 #endif 61 62 /* Define which commmands should be available at u-boot command prompt */ 63 64 #define CONFIG_CMD_CACHE 65 #define CONFIG_CMD_DATE 66 #define CONFIG_CMD_ELF 67 #define CONFIG_CMD_FLASH 68 #define CONFIG_CMD_I2C 69 #define CONFIG_CMD_MEMORY 70 #define CONFIG_CMD_MISC 71 #define CONFIG_CMD_XIMG 72 #undef CONFIG_CMD_NET 73 #undef CONFIG_CMD_NFS 74 #if ENABLE_JFFS 75 #define CONFIG_CMD_JFFS2 76 #endif 77 #define CONFIG_CMD_REGINFO 78 #define CONFIG_CMD_LOADS 79 #define CONFIG_CMD_LOADB 80 #define CONFIG_CMD_FPGA 81 #define CONFIG_CMD_FPGA_LOADMK 82 #define CONFIG_CMDLINE_EDITING 83 84 #define CONFIG_SYS_HUSH_PARSER 85 86 #define CONFIG_MCFRTC 87 #undef RTC_DEBUG 88 89 /* Timer */ 90 #define CONFIG_MCFTMR 91 #undef CONFIG_MCFPIT 92 93 /* I2C */ 94 #define CONFIG_SYS_I2C 95 #define CONFIG_SYS_I2C_FSL 96 #define CONFIG_SYS_FSL_I2C_SPEED 80000 97 #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F 98 #define CONFIG_SYS_FSL_I2C_OFFSET 0x58000 99 #define CONFIG_SYS_IMMR CONFIG_SYS_MBAR 100 101 /* 102 * Defines processor clock - important for correct timings concerning serial 103 * interface etc. 104 */ 105 106 #define CONFIG_SYS_CLK 80000000 107 #define CONFIG_SYS_CPU_CLK (CONFIG_SYS_CLK * 3) 108 #define CONFIG_SYS_SDRAM_SIZE 32 /* SDRAM size in MB */ 109 110 #define CONFIG_SYS_CORE_SRAM_SIZE 0x8000 111 #define CONFIG_SYS_CORE_SRAM 0x80000000 112 113 #define CONFIG_SYS_UNIFY_CACHE 114 115 /* 116 * Define baudrate for UART1 (console output, tftp, ...) 117 * default value of CONFIG_BAUDRATE for Sentec board: 19200 baud 118 * CONFIG_SYS_BAUDRATE_TABLE defines values that can be selected 119 * in u-boot command interface 120 */ 121 122 #define CONFIG_BAUDRATE 115200 123 124 #define CONFIG_MCFUART 125 #define CONFIG_SYS_UART_PORT (2) 126 #define CONFIG_SYS_UART2_ALT3_GPIO 127 128 /* 129 * Watchdog configuration; Watchdog is disabled for running from RAM 130 * and set to highest possible value else. Beware there is no check 131 * in the watchdog code to validate the timeout value set here! 132 */ 133 134 #ifndef CONFIG_MONITOR_IS_IN_RAM 135 #define CONFIG_WATCHDOG 136 #define CONFIG_WATCHDOG_TIMEOUT 3355 /* timeout in milliseconds */ 137 #endif 138 139 /* 140 * Configuration for environment 141 * Environment is located in the last sector of the flash 142 */ 143 144 #ifndef CONFIG_MONITOR_IS_IN_RAM 145 #define CONFIG_ENV_OFFSET 0x1FF8000 146 #define CONFIG_ENV_SECT_SIZE 0x8000 147 #define CONFIG_ENV_IS_IN_FLASH 1 148 #else 149 /* 150 * environment in RAM - This is used to use a single PC-based application 151 * to load an image, load U-Boot, load an environment and then start U-Boot 152 * to execute the commands from the environment. Feedback is done via setting 153 * and reading memory locations. 154 */ 155 #define CONFIG_ENV_ADDR 0x40060000 156 #define CONFIG_ENV_SECT_SIZE 0x8000 157 #define CONFIG_ENV_IS_IN_FLASH 1 158 #endif 159 160 /* here we put our FPGA configuration... */ 161 #define CONFIG_MISC_INIT_R 1 162 163 /* Define user parameters that have to be customized most likely */ 164 165 /* AUTOBOOT settings - booting images automatically by u-boot after power on */ 166 167 /* 168 * used for autoboot, delay in seconds u-boot will wait before starting 169 * defined (auto-)boot command, setting to -1 disables delay, setting to 170 * 0 will too prevent access to u-boot command interface: u-boot then has 171 * to be reflashed 172 * beware - watchdog is not serviced during autoboot delay time! 173 */ 174 #ifdef CONFIG_MONITOR_IS_IN_RAM 175 #define CONFIG_BOOTDELAY 1 176 #else 177 #define CONFIG_BOOTDELAY 1 178 #endif 179 180 /* 181 * The following settings will be contained in the environment block ; if you 182 * want to use a neutral environment all those settings can be manually set in 183 * u-boot: 'set' command 184 */ 185 186 #define CONFIG_EXTRA_ENV_SETTINGS \ 187 "loaderversion=11\0" \ 188 "card_id="__stringify(ASTRO_ID)"\0" \ 189 "alterafile=0\0" \ 190 "xilinxfile=0\0" \ 191 "xilinxload=imxtract 0x540000 $xilinxfile 0x41000000&&"\ 192 "fpga load 0 0x41000000 $filesize\0" \ 193 "alteraload=imxtract 0x6c0000 $alterafile 0x41000000&&"\ 194 "fpga load 1 0x41000000 $filesize\0" \ 195 "env_default=1\0" \ 196 "env_check=if test $env_default -eq 1;"\ 197 " then setenv env_default 0;saveenv;fi\0" 198 199 /* 200 * "update" is a non-standard command that has to be supplied 201 * by external update.c; This is not included in mainline because 202 * it needs non-blocking CFI routines. 203 */ 204 #ifdef CONFIG_MONITOR_IS_IN_RAM 205 #define CONFIG_BOOTCOMMAND "" /* no autoboot in this case */ 206 #else 207 #if CONFIG_ASTRO_V532 208 #define CONFIG_BOOTCOMMAND "protect off 0x80000 0x1ffffff;run env_check;"\ 209 "run xilinxload&&run alteraload&&bootm 0x80000;"\ 210 "update;reset" 211 #else 212 #define CONFIG_BOOTCOMMAND "protect off 0x80000 0x1ffffff;run env_check;"\ 213 "run xilinxload&&bootm 0x80000;update;reset" 214 #endif 215 #endif 216 217 /* default bootargs that are considered during boot */ 218 #define CONFIG_BOOTARGS " console=ttyS2,115200 rootfstype=romfs"\ 219 " loaderversion=$loaderversion" 220 221 #define CONFIG_SYS_PROMPT "URMEL > " 222 223 /* default RAM address for user programs */ 224 #define CONFIG_SYS_LOAD_ADDR 0x20000 225 226 #define CONFIG_SYS_LONGHELP 227 228 #if (CONFIG_COMMANDS & CONFIG_CMD_KGDB) 229 #define CONFIG_SYS_CBSIZE 1024 230 #else 231 #define CONFIG_SYS_CBSIZE 256 232 #endif 233 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) 234 #define CONFIG_SYS_MAXARGS 16 235 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 236 237 #define CONFIG_FPGA_COUNT 1 238 #define CONFIG_FPGA 239 #define CONFIG_FPGA_XILINX 240 #define CONFIG_FPGA_SPARTAN3 241 #define CONFIG_FPGA_ALTERA 242 #define CONFIG_FPGA_CYCLON2 243 #define CONFIG_SYS_FPGA_PROG_FEEDBACK 244 #define CONFIG_SYS_FPGA_WAIT 1000 245 246 /* End of user parameters to be customized */ 247 248 /* Defines memory range for test */ 249 250 #define CONFIG_SYS_MEMTEST_START 0x40020000 251 #define CONFIG_SYS_MEMTEST_END 0x41ffffff 252 253 /* 254 * Low Level Configuration Settings 255 * (address mappings, register initial values, etc.) 256 * You should know what you are doing if you make changes here. 257 */ 258 259 /* Base register address */ 260 261 #define CONFIG_SYS_MBAR 0xFC000000 /* Register Base Addrs */ 262 263 /* System Conf. Reg. & System Protection Reg. */ 264 265 #define CONFIG_SYS_SCR 0x0003; 266 #define CONFIG_SYS_SPR 0xffff; 267 268 /* 269 * Definitions for initial stack pointer and data area (in internal SRAM) 270 */ 271 #define CONFIG_SYS_INIT_RAM_ADDR 0x80000000 272 #define CONFIG_SYS_INIT_RAM_SIZE 0x8000 273 #define CONFIG_SYS_INIT_RAM_CTRL 0x221 274 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ 275 GENERATED_GBL_DATA_SIZE) 276 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET 277 278 /* 279 * Start addresses for the final memory configuration 280 * (Set up by the startup code) 281 * for MCF5373, the allowable range is 0x40000000 to 0x7FF00000 282 */ 283 #define CONFIG_SYS_SDRAM_BASE 0x40000000 284 285 /* 286 * Chipselect bank definitions 287 * 288 * CS0 - Flash 32MB (first 16MB) 289 * CS1 - Flash 32MB (second half) 290 * CS2 - FPGA 291 * CS3 - FPGA 292 * CS4 - unused 293 * CS5 - unused 294 */ 295 #define CONFIG_SYS_CS0_BASE 0 296 #define CONFIG_SYS_CS0_MASK 0x00ff0001 297 #define CONFIG_SYS_CS0_CTRL 0x00001fc0 298 299 #define CONFIG_SYS_CS1_BASE 0x01000000 300 #define CONFIG_SYS_CS1_MASK 0x00ff0001 301 #define CONFIG_SYS_CS1_CTRL 0x00001fc0 302 303 #define CONFIG_SYS_CS2_BASE 0x20000000 304 #define CONFIG_SYS_CS2_MASK 0x00ff0001 305 #define CONFIG_SYS_CS2_CTRL 0x0000fec0 306 307 #define CONFIG_SYS_CS3_BASE 0x21000000 308 #define CONFIG_SYS_CS3_MASK 0x00ff0001 309 #define CONFIG_SYS_CS3_CTRL 0x0000fec0 310 311 #define CONFIG_SYS_FLASH_BASE 0x00000000 312 313 #ifdef CONFIG_MONITOR_IS_IN_RAM 314 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE 315 #else 316 /* This is mainly used during relocation in start.S */ 317 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) 318 #endif 319 /* Reserve 256 kB for Monitor */ 320 #define CONFIG_SYS_MONITOR_LEN (256 << 10) 321 322 #define CONFIG_SYS_BOOTPARAMS_LEN (64 * 1024) 323 /* Reserve 128 kB for malloc() */ 324 #define CONFIG_SYS_MALLOC_LEN (128 << 10) 325 326 /* 327 * For booting Linux, the board info and command line data 328 * have to be in the first 8 MB of memory, since this is 329 * the maximum mapped by the Linux kernel during initialization ?? 330 */ 331 #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + \ 332 (CONFIG_SYS_SDRAM_SIZE << 20)) 333 334 /* FLASH organization */ 335 #define CONFIG_SYS_MAX_FLASH_BANKS 1 336 #define CONFIG_SYS_MAX_FLASH_SECT 259 337 #define CONFIG_SYS_FLASH_ERASE_TOUT 1000 338 339 #define CONFIG_SYS_FLASH_CFI 1 340 #define CONFIG_FLASH_CFI_DRIVER 1 341 #define CONFIG_SYS_FLASH_SIZE 0x2000000 342 #define CONFIG_SYS_FLASH_PROTECTION 1 343 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 344 #define CONFIG_SYS_FLASH_CFI_NONBLOCK 1 345 346 #if ENABLE_JFFS 347 /* JFFS Partition offset set */ 348 #define CONFIG_SYS_JFFS2_FIRST_BANK 0 349 #define CONFIG_SYS_JFFS2_NUM_BANKS 1 350 /* 512k reserved for u-boot */ 351 #define CONFIG_SYS_JFFS2_FIRST_SECTOR 0x40 352 #endif 353 354 /* Cache Configuration */ 355 #define CONFIG_SYS_CACHELINE_SIZE 16 356 357 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ 358 CONFIG_SYS_INIT_RAM_SIZE - 8) 359 #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ 360 CONFIG_SYS_INIT_RAM_SIZE - 4) 361 #define CONFIG_SYS_ICACHE_INV (CF_CACR_CINVA) 362 #define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \ 363 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \ 364 CF_ACR_EN | CF_ACR_SM_ALL) 365 #define CONFIG_SYS_CACHE_ICACR (CF_CACR_EC | CF_CACR_CINVA | \ 366 CF_CACR_DCM_P) 367 368 #endif /* _CONFIG_ASTRO_MCF5373L_H */ 369