1 /* 2 * Configuration settings for the Sentec Cobra Board. 3 * 4 * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de> 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 /* 10 * configuration for ASTRO "Urmel" board. 11 * Originating from Cobra5272 configuration, messed up by 12 * Wolfgang Wegner <w.wegner@astro-kom.de> 13 * Please do not bother the original author with bug reports 14 * concerning this file. 15 */ 16 17 #ifndef _CONFIG_ASTRO_MCF5373L_H 18 #define _CONFIG_ASTRO_MCF5373L_H 19 20 #include <linux/stringify.h> 21 22 /* 23 * set the card type to actually compile for; either of 24 * the possibilities listed below has to be used! 25 */ 26 #define CONFIG_ASTRO_V532 1 27 28 #if CONFIG_ASTRO_V532 29 #define ASTRO_ID 0xF8 30 #elif CONFIG_ASTRO_V512 31 #define ASTRO_ID 0xFA 32 #elif CONFIG_ASTRO_TWIN7S2 33 #define ASTRO_ID 0xF9 34 #elif CONFIG_ASTRO_V912 35 #define ASTRO_ID 0xFC 36 #elif CONFIG_ASTRO_COFDMDUOS2 37 #define ASTRO_ID 0xFB 38 #else 39 #error No card type defined! 40 #endif 41 42 /* Command line configuration */ 43 /* 44 * CONFIG_RAM defines if u-boot is loaded via BDM (or started from 45 * a different bootloader that has already performed RAM setup) or 46 * started directly from flash, which is the regular case for production 47 * boards. 48 */ 49 #ifdef CONFIG_RAM 50 #define CONFIG_MONITOR_IS_IN_RAM 51 #define CONFIG_SYS_TEXT_BASE 0x40020000 52 #define ENABLE_JFFS 0 53 #else 54 #define CONFIG_SYS_TEXT_BASE 0x00000000 55 #define ENABLE_JFFS 1 56 #endif 57 58 #define CONFIG_CMDLINE_EDITING 59 60 #define CONFIG_MCFRTC 61 #undef RTC_DEBUG 62 63 /* Timer */ 64 #define CONFIG_MCFTMR 65 #undef CONFIG_MCFPIT 66 67 /* I2C */ 68 #define CONFIG_SYS_I2C 69 #define CONFIG_SYS_I2C_FSL 70 #define CONFIG_SYS_FSL_I2C_SPEED 80000 71 #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F 72 #define CONFIG_SYS_FSL_I2C_OFFSET 0x58000 73 #define CONFIG_SYS_IMMR CONFIG_SYS_MBAR 74 75 /* 76 * Defines processor clock - important for correct timings concerning serial 77 * interface etc. 78 */ 79 80 #define CONFIG_SYS_CLK 80000000 81 #define CONFIG_SYS_CPU_CLK (CONFIG_SYS_CLK * 3) 82 #define CONFIG_SYS_SDRAM_SIZE 32 /* SDRAM size in MB */ 83 84 #define CONFIG_SYS_CORE_SRAM_SIZE 0x8000 85 #define CONFIG_SYS_CORE_SRAM 0x80000000 86 87 #define CONFIG_SYS_UNIFY_CACHE 88 89 /* 90 * Define baudrate for UART1 (console output, tftp, ...) 91 * default value of CONFIG_BAUDRATE for Sentec board: 19200 baud 92 * CONFIG_SYS_BAUDRATE_TABLE defines values that can be selected 93 * in u-boot command interface 94 */ 95 96 #define CONFIG_MCFUART 97 #define CONFIG_SYS_UART_PORT (2) 98 #define CONFIG_SYS_UART2_ALT3_GPIO 99 100 /* 101 * Watchdog configuration; Watchdog is disabled for running from RAM 102 * and set to highest possible value else. Beware there is no check 103 * in the watchdog code to validate the timeout value set here! 104 */ 105 106 #ifndef CONFIG_MONITOR_IS_IN_RAM 107 #define CONFIG_WATCHDOG 108 #define CONFIG_WATCHDOG_TIMEOUT 3355 /* timeout in milliseconds */ 109 #endif 110 111 /* 112 * Configuration for environment 113 * Environment is located in the last sector of the flash 114 */ 115 116 #ifndef CONFIG_MONITOR_IS_IN_RAM 117 #define CONFIG_ENV_OFFSET 0x1FF8000 118 #define CONFIG_ENV_SECT_SIZE 0x8000 119 #else 120 /* 121 * environment in RAM - This is used to use a single PC-based application 122 * to load an image, load U-Boot, load an environment and then start U-Boot 123 * to execute the commands from the environment. Feedback is done via setting 124 * and reading memory locations. 125 */ 126 #define CONFIG_ENV_ADDR 0x40060000 127 #define CONFIG_ENV_SECT_SIZE 0x8000 128 #endif 129 130 /* here we put our FPGA configuration... */ 131 #define CONFIG_MISC_INIT_R 1 132 133 /* Define user parameters that have to be customized most likely */ 134 135 /* AUTOBOOT settings - booting images automatically by u-boot after power on */ 136 137 /* 138 * The following settings will be contained in the environment block ; if you 139 * want to use a neutral environment all those settings can be manually set in 140 * u-boot: 'set' command 141 */ 142 143 #define CONFIG_EXTRA_ENV_SETTINGS \ 144 "loaderversion=11\0" \ 145 "card_id="__stringify(ASTRO_ID)"\0" \ 146 "alterafile=0\0" \ 147 "xilinxfile=0\0" \ 148 "xilinxload=imxtract 0x540000 $xilinxfile 0x41000000&&"\ 149 "fpga load 0 0x41000000 $filesize\0" \ 150 "alteraload=imxtract 0x6c0000 $alterafile 0x41000000&&"\ 151 "fpga load 1 0x41000000 $filesize\0" \ 152 "env_default=1\0" \ 153 "env_check=if test $env_default -eq 1;"\ 154 " then setenv env_default 0;saveenv;fi\0" 155 156 /* 157 * "update" is a non-standard command that has to be supplied 158 * by external update.c; This is not included in mainline because 159 * it needs non-blocking CFI routines. 160 */ 161 #ifdef CONFIG_MONITOR_IS_IN_RAM 162 #define CONFIG_BOOTCOMMAND "" /* no autoboot in this case */ 163 #else 164 #if CONFIG_ASTRO_V532 165 #define CONFIG_BOOTCOMMAND "protect off 0x80000 0x1ffffff;run env_check;"\ 166 "run xilinxload&&run alteraload&&bootm 0x80000;"\ 167 "update;reset" 168 #else 169 #define CONFIG_BOOTCOMMAND "protect off 0x80000 0x1ffffff;run env_check;"\ 170 "run xilinxload&&bootm 0x80000;update;reset" 171 #endif 172 #endif 173 174 /* default RAM address for user programs */ 175 #define CONFIG_SYS_LOAD_ADDR 0x20000 176 177 #define CONFIG_SYS_LONGHELP 178 179 #define CONFIG_FPGA_COUNT 1 180 #define CONFIG_FPGA_XILINX 181 #define CONFIG_FPGA_SPARTAN3 182 #define CONFIG_FPGA_CYCLON2 183 #define CONFIG_SYS_FPGA_PROG_FEEDBACK 184 #define CONFIG_SYS_FPGA_WAIT 1000 185 186 /* End of user parameters to be customized */ 187 188 /* Defines memory range for test */ 189 190 #define CONFIG_SYS_MEMTEST_START 0x40020000 191 #define CONFIG_SYS_MEMTEST_END 0x41ffffff 192 193 /* 194 * Low Level Configuration Settings 195 * (address mappings, register initial values, etc.) 196 * You should know what you are doing if you make changes here. 197 */ 198 199 /* Base register address */ 200 201 #define CONFIG_SYS_MBAR 0xFC000000 /* Register Base Addrs */ 202 203 /* System Conf. Reg. & System Protection Reg. */ 204 205 #define CONFIG_SYS_SCR 0x0003; 206 #define CONFIG_SYS_SPR 0xffff; 207 208 /* 209 * Definitions for initial stack pointer and data area (in internal SRAM) 210 */ 211 #define CONFIG_SYS_INIT_RAM_ADDR 0x80000000 212 #define CONFIG_SYS_INIT_RAM_SIZE 0x8000 213 #define CONFIG_SYS_INIT_RAM_CTRL 0x221 214 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ 215 GENERATED_GBL_DATA_SIZE) 216 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET 217 218 /* 219 * Start addresses for the final memory configuration 220 * (Set up by the startup code) 221 * for MCF5373, the allowable range is 0x40000000 to 0x7FF00000 222 */ 223 #define CONFIG_SYS_SDRAM_BASE 0x40000000 224 225 /* 226 * Chipselect bank definitions 227 * 228 * CS0 - Flash 32MB (first 16MB) 229 * CS1 - Flash 32MB (second half) 230 * CS2 - FPGA 231 * CS3 - FPGA 232 * CS4 - unused 233 * CS5 - unused 234 */ 235 #define CONFIG_SYS_CS0_BASE 0 236 #define CONFIG_SYS_CS0_MASK 0x00ff0001 237 #define CONFIG_SYS_CS0_CTRL 0x00001fc0 238 239 #define CONFIG_SYS_CS1_BASE 0x01000000 240 #define CONFIG_SYS_CS1_MASK 0x00ff0001 241 #define CONFIG_SYS_CS1_CTRL 0x00001fc0 242 243 #define CONFIG_SYS_CS2_BASE 0x20000000 244 #define CONFIG_SYS_CS2_MASK 0x00ff0001 245 #define CONFIG_SYS_CS2_CTRL 0x0000fec0 246 247 #define CONFIG_SYS_CS3_BASE 0x21000000 248 #define CONFIG_SYS_CS3_MASK 0x00ff0001 249 #define CONFIG_SYS_CS3_CTRL 0x0000fec0 250 251 #define CONFIG_SYS_FLASH_BASE 0x00000000 252 253 #ifdef CONFIG_MONITOR_IS_IN_RAM 254 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE 255 #else 256 /* This is mainly used during relocation in start.S */ 257 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) 258 #endif 259 /* Reserve 256 kB for Monitor */ 260 #define CONFIG_SYS_MONITOR_LEN (256 << 10) 261 262 #define CONFIG_SYS_BOOTPARAMS_LEN (64 * 1024) 263 /* Reserve 128 kB for malloc() */ 264 #define CONFIG_SYS_MALLOC_LEN (128 << 10) 265 266 /* 267 * For booting Linux, the board info and command line data 268 * have to be in the first 8 MB of memory, since this is 269 * the maximum mapped by the Linux kernel during initialization ?? 270 */ 271 #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + \ 272 (CONFIG_SYS_SDRAM_SIZE << 20)) 273 274 /* FLASH organization */ 275 #define CONFIG_SYS_MAX_FLASH_BANKS 1 276 #define CONFIG_SYS_MAX_FLASH_SECT 259 277 #define CONFIG_SYS_FLASH_ERASE_TOUT 1000 278 279 #define CONFIG_SYS_FLASH_CFI 1 280 #define CONFIG_FLASH_CFI_DRIVER 1 281 #define CONFIG_SYS_FLASH_SIZE 0x2000000 282 #define CONFIG_SYS_FLASH_PROTECTION 1 283 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 284 #define CONFIG_SYS_FLASH_CFI_NONBLOCK 1 285 286 #define LDS_BOARD_TEXT \ 287 . = DEFINED(env_offset) ? env_offset : .; \ 288 env/embedded.o(.text*) 289 290 #if ENABLE_JFFS 291 /* JFFS Partition offset set */ 292 #define CONFIG_SYS_JFFS2_FIRST_BANK 0 293 #define CONFIG_SYS_JFFS2_NUM_BANKS 1 294 /* 512k reserved for u-boot */ 295 #define CONFIG_SYS_JFFS2_FIRST_SECTOR 0x40 296 #endif 297 298 /* Cache Configuration */ 299 #define CONFIG_SYS_CACHELINE_SIZE 16 300 301 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ 302 CONFIG_SYS_INIT_RAM_SIZE - 8) 303 #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ 304 CONFIG_SYS_INIT_RAM_SIZE - 4) 305 #define CONFIG_SYS_ICACHE_INV (CF_CACR_CINVA) 306 #define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \ 307 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \ 308 CF_ACR_EN | CF_ACR_SM_ALL) 309 #define CONFIG_SYS_CACHE_ICACR (CF_CACR_EC | CF_CACR_CINVA | \ 310 CF_CACR_DCM_P) 311 312 #endif /* _CONFIG_ASTRO_MCF5373L_H */ 313