1 /* 2 * Configuration settings for the Sentec Cobra Board. 3 * 4 * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de> 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 /* 10 * configuration for ASTRO "Urmel" board. 11 * Originating from Cobra5272 configuration, messed up by 12 * Wolfgang Wegner <w.wegner@astro-kom.de> 13 * Please do not bother the original author with bug reports 14 * concerning this file. 15 */ 16 17 #ifndef _CONFIG_ASTRO_MCF5373L_H 18 #define _CONFIG_ASTRO_MCF5373L_H 19 20 #include <linux/stringify.h> 21 22 /* 23 * set the card type to actually compile for; either of 24 * the possibilities listed below has to be used! 25 */ 26 #define CONFIG_ASTRO_V532 1 27 28 #if CONFIG_ASTRO_V532 29 #define ASTRO_ID 0xF8 30 #elif CONFIG_ASTRO_V512 31 #define ASTRO_ID 0xFA 32 #elif CONFIG_ASTRO_TWIN7S2 33 #define ASTRO_ID 0xF9 34 #elif CONFIG_ASTRO_V912 35 #define ASTRO_ID 0xFC 36 #elif CONFIG_ASTRO_COFDMDUOS2 37 #define ASTRO_ID 0xFB 38 #else 39 #error No card type defined! 40 #endif 41 42 /* Command line configuration */ 43 /* 44 * CONFIG_RAM defines if u-boot is loaded via BDM (or started from 45 * a different bootloader that has already performed RAM setup) or 46 * started directly from flash, which is the regular case for production 47 * boards. 48 */ 49 #ifdef CONFIG_RAM 50 #define CONFIG_MONITOR_IS_IN_RAM 51 #define ENABLE_JFFS 0 52 #else 53 #define ENABLE_JFFS 1 54 #endif 55 56 #define CONFIG_MCFRTC 57 #undef RTC_DEBUG 58 59 /* Timer */ 60 #define CONFIG_MCFTMR 61 #undef CONFIG_MCFPIT 62 63 /* I2C */ 64 #define CONFIG_SYS_I2C 65 #define CONFIG_SYS_I2C_FSL 66 #define CONFIG_SYS_FSL_I2C_SPEED 80000 67 #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F 68 #define CONFIG_SYS_FSL_I2C_OFFSET 0x58000 69 #define CONFIG_SYS_IMMR CONFIG_SYS_MBAR 70 71 /* 72 * Defines processor clock - important for correct timings concerning serial 73 * interface etc. 74 */ 75 76 #define CONFIG_SYS_CLK 80000000 77 #define CONFIG_SYS_CPU_CLK (CONFIG_SYS_CLK * 3) 78 #define CONFIG_SYS_SDRAM_SIZE 32 /* SDRAM size in MB */ 79 80 #define CONFIG_SYS_CORE_SRAM_SIZE 0x8000 81 #define CONFIG_SYS_CORE_SRAM 0x80000000 82 83 #define CONFIG_SYS_UNIFY_CACHE 84 85 /* 86 * Define baudrate for UART1 (console output, tftp, ...) 87 * default value of CONFIG_BAUDRATE for Sentec board: 19200 baud 88 * CONFIG_SYS_BAUDRATE_TABLE defines values that can be selected 89 * in u-boot command interface 90 */ 91 92 #define CONFIG_MCFUART 93 #define CONFIG_SYS_UART_PORT (2) 94 #define CONFIG_SYS_UART2_ALT3_GPIO 95 96 /* 97 * Watchdog configuration; Watchdog is disabled for running from RAM 98 * and set to highest possible value else. Beware there is no check 99 * in the watchdog code to validate the timeout value set here! 100 */ 101 102 #ifndef CONFIG_MONITOR_IS_IN_RAM 103 #define CONFIG_WATCHDOG 104 #define CONFIG_WATCHDOG_TIMEOUT 3355 /* timeout in milliseconds */ 105 #endif 106 107 /* 108 * Configuration for environment 109 * Environment is located in the last sector of the flash 110 */ 111 112 #ifndef CONFIG_MONITOR_IS_IN_RAM 113 #define CONFIG_ENV_OFFSET 0x1FF8000 114 #define CONFIG_ENV_SECT_SIZE 0x8000 115 #else 116 /* 117 * environment in RAM - This is used to use a single PC-based application 118 * to load an image, load U-Boot, load an environment and then start U-Boot 119 * to execute the commands from the environment. Feedback is done via setting 120 * and reading memory locations. 121 */ 122 #define CONFIG_ENV_ADDR 0x40060000 123 #define CONFIG_ENV_SECT_SIZE 0x8000 124 #endif 125 126 /* here we put our FPGA configuration... */ 127 #define CONFIG_MISC_INIT_R 1 128 129 /* Define user parameters that have to be customized most likely */ 130 131 /* AUTOBOOT settings - booting images automatically by u-boot after power on */ 132 133 /* 134 * The following settings will be contained in the environment block ; if you 135 * want to use a neutral environment all those settings can be manually set in 136 * u-boot: 'set' command 137 */ 138 139 #define CONFIG_EXTRA_ENV_SETTINGS \ 140 "loaderversion=11\0" \ 141 "card_id="__stringify(ASTRO_ID)"\0" \ 142 "alterafile=0\0" \ 143 "xilinxfile=0\0" \ 144 "xilinxload=imxtract 0x540000 $xilinxfile 0x41000000&&"\ 145 "fpga load 0 0x41000000 $filesize\0" \ 146 "alteraload=imxtract 0x6c0000 $alterafile 0x41000000&&"\ 147 "fpga load 1 0x41000000 $filesize\0" \ 148 "env_default=1\0" \ 149 "env_check=if test $env_default -eq 1;"\ 150 " then setenv env_default 0;saveenv;fi\0" 151 152 /* 153 * "update" is a non-standard command that has to be supplied 154 * by external update.c; This is not included in mainline because 155 * it needs non-blocking CFI routines. 156 */ 157 #ifdef CONFIG_MONITOR_IS_IN_RAM 158 #define CONFIG_BOOTCOMMAND "" /* no autoboot in this case */ 159 #else 160 #if CONFIG_ASTRO_V532 161 #define CONFIG_BOOTCOMMAND "protect off 0x80000 0x1ffffff;run env_check;"\ 162 "run xilinxload&&run alteraload&&bootm 0x80000;"\ 163 "update;reset" 164 #else 165 #define CONFIG_BOOTCOMMAND "protect off 0x80000 0x1ffffff;run env_check;"\ 166 "run xilinxload&&bootm 0x80000;update;reset" 167 #endif 168 #endif 169 170 /* default RAM address for user programs */ 171 #define CONFIG_SYS_LOAD_ADDR 0x20000 172 173 #define CONFIG_FPGA_COUNT 1 174 #define CONFIG_SYS_FPGA_PROG_FEEDBACK 175 #define CONFIG_SYS_FPGA_WAIT 1000 176 177 /* End of user parameters to be customized */ 178 179 /* Defines memory range for test */ 180 181 #define CONFIG_SYS_MEMTEST_START 0x40020000 182 #define CONFIG_SYS_MEMTEST_END 0x41ffffff 183 184 /* 185 * Low Level Configuration Settings 186 * (address mappings, register initial values, etc.) 187 * You should know what you are doing if you make changes here. 188 */ 189 190 /* Base register address */ 191 192 #define CONFIG_SYS_MBAR 0xFC000000 /* Register Base Addrs */ 193 194 /* System Conf. Reg. & System Protection Reg. */ 195 196 #define CONFIG_SYS_SCR 0x0003; 197 #define CONFIG_SYS_SPR 0xffff; 198 199 /* 200 * Definitions for initial stack pointer and data area (in internal SRAM) 201 */ 202 #define CONFIG_SYS_INIT_RAM_ADDR 0x80000000 203 #define CONFIG_SYS_INIT_RAM_SIZE 0x8000 204 #define CONFIG_SYS_INIT_RAM_CTRL 0x221 205 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ 206 GENERATED_GBL_DATA_SIZE) 207 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET 208 209 /* 210 * Start addresses for the final memory configuration 211 * (Set up by the startup code) 212 * for MCF5373, the allowable range is 0x40000000 to 0x7FF00000 213 */ 214 #define CONFIG_SYS_SDRAM_BASE 0x40000000 215 216 /* 217 * Chipselect bank definitions 218 * 219 * CS0 - Flash 32MB (first 16MB) 220 * CS1 - Flash 32MB (second half) 221 * CS2 - FPGA 222 * CS3 - FPGA 223 * CS4 - unused 224 * CS5 - unused 225 */ 226 #define CONFIG_SYS_CS0_BASE 0 227 #define CONFIG_SYS_CS0_MASK 0x00ff0001 228 #define CONFIG_SYS_CS0_CTRL 0x00001fc0 229 230 #define CONFIG_SYS_CS1_BASE 0x01000000 231 #define CONFIG_SYS_CS1_MASK 0x00ff0001 232 #define CONFIG_SYS_CS1_CTRL 0x00001fc0 233 234 #define CONFIG_SYS_CS2_BASE 0x20000000 235 #define CONFIG_SYS_CS2_MASK 0x00ff0001 236 #define CONFIG_SYS_CS2_CTRL 0x0000fec0 237 238 #define CONFIG_SYS_CS3_BASE 0x21000000 239 #define CONFIG_SYS_CS3_MASK 0x00ff0001 240 #define CONFIG_SYS_CS3_CTRL 0x0000fec0 241 242 #define CONFIG_SYS_FLASH_BASE 0x00000000 243 244 #ifdef CONFIG_MONITOR_IS_IN_RAM 245 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE 246 #else 247 /* This is mainly used during relocation in start.S */ 248 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) 249 #endif 250 /* Reserve 256 kB for Monitor */ 251 #define CONFIG_SYS_MONITOR_LEN (256 << 10) 252 253 #define CONFIG_SYS_BOOTPARAMS_LEN (64 * 1024) 254 /* Reserve 128 kB for malloc() */ 255 #define CONFIG_SYS_MALLOC_LEN (128 << 10) 256 257 /* 258 * For booting Linux, the board info and command line data 259 * have to be in the first 8 MB of memory, since this is 260 * the maximum mapped by the Linux kernel during initialization ?? 261 */ 262 #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + \ 263 (CONFIG_SYS_SDRAM_SIZE << 20)) 264 265 /* FLASH organization */ 266 #define CONFIG_SYS_MAX_FLASH_BANKS 1 267 #define CONFIG_SYS_MAX_FLASH_SECT 259 268 #define CONFIG_SYS_FLASH_ERASE_TOUT 1000 269 270 #define CONFIG_SYS_FLASH_CFI 1 271 #define CONFIG_FLASH_CFI_DRIVER 1 272 #define CONFIG_SYS_FLASH_SIZE 0x2000000 273 #define CONFIG_SYS_FLASH_PROTECTION 1 274 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 275 #define CONFIG_SYS_FLASH_CFI_NONBLOCK 1 276 277 #define LDS_BOARD_TEXT \ 278 . = DEFINED(env_offset) ? env_offset : .; \ 279 env/embedded.o(.text*) 280 281 #if ENABLE_JFFS 282 /* JFFS Partition offset set */ 283 #define CONFIG_SYS_JFFS2_FIRST_BANK 0 284 #define CONFIG_SYS_JFFS2_NUM_BANKS 1 285 /* 512k reserved for u-boot */ 286 #define CONFIG_SYS_JFFS2_FIRST_SECTOR 0x40 287 #endif 288 289 /* Cache Configuration */ 290 #define CONFIG_SYS_CACHELINE_SIZE 16 291 292 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ 293 CONFIG_SYS_INIT_RAM_SIZE - 8) 294 #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ 295 CONFIG_SYS_INIT_RAM_SIZE - 4) 296 #define CONFIG_SYS_ICACHE_INV (CF_CACR_CINVA) 297 #define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \ 298 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \ 299 CF_ACR_EN | CF_ACR_SM_ALL) 300 #define CONFIG_SYS_CACHE_ICACR (CF_CACR_EC | CF_CACR_CINVA | \ 301 CF_CACR_DCM_P) 302 303 #endif /* _CONFIG_ASTRO_MCF5373L_H */ 304