1 /* 2 * Configuration settings for the Sentec Cobra Board. 3 * 4 * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de> 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 /* 10 * configuration for ASTRO "Urmel" board. 11 * Originating from Cobra5272 configuration, messed up by 12 * Wolfgang Wegner <w.wegner@astro-kom.de> 13 * Please do not bother the original author with bug reports 14 * concerning this file. 15 */ 16 17 #ifndef _CONFIG_ASTRO_MCF5373L_H 18 #define _CONFIG_ASTRO_MCF5373L_H 19 20 #include <linux/stringify.h> 21 22 /* 23 * set the card type to actually compile for; either of 24 * the possibilities listed below has to be used! 25 */ 26 #define CONFIG_ASTRO_V532 1 27 28 #if CONFIG_ASTRO_V532 29 #define ASTRO_ID 0xF8 30 #elif CONFIG_ASTRO_V512 31 #define ASTRO_ID 0xFA 32 #elif CONFIG_ASTRO_TWIN7S2 33 #define ASTRO_ID 0xF9 34 #elif CONFIG_ASTRO_V912 35 #define ASTRO_ID 0xFC 36 #elif CONFIG_ASTRO_COFDMDUOS2 37 #define ASTRO_ID 0xFB 38 #else 39 #error No card type defined! 40 #endif 41 42 #define CONFIG_ASTRO5373L /* define board type */ 43 44 /* Command line configuration */ 45 /* 46 * CONFIG_RAM defines if u-boot is loaded via BDM (or started from 47 * a different bootloader that has already performed RAM setup) or 48 * started directly from flash, which is the regular case for production 49 * boards. 50 */ 51 #ifdef CONFIG_RAM 52 #define CONFIG_MONITOR_IS_IN_RAM 53 #define CONFIG_SYS_TEXT_BASE 0x40020000 54 #define ENABLE_JFFS 0 55 #else 56 #define CONFIG_SYS_TEXT_BASE 0x00000000 57 #define ENABLE_JFFS 1 58 #endif 59 60 /* Define which commands should be available at u-boot command prompt */ 61 62 #define CONFIG_CMD_DATE 63 #if ENABLE_JFFS 64 #define CONFIG_CMD_JFFS2 65 #endif 66 #define CONFIG_CMD_REGINFO 67 #define CONFIG_CMD_FPGA_LOADMK 68 #define CONFIG_CMDLINE_EDITING 69 70 #define CONFIG_MCFRTC 71 #undef RTC_DEBUG 72 73 /* Timer */ 74 #define CONFIG_MCFTMR 75 #undef CONFIG_MCFPIT 76 77 /* I2C */ 78 #define CONFIG_SYS_I2C 79 #define CONFIG_SYS_I2C_FSL 80 #define CONFIG_SYS_FSL_I2C_SPEED 80000 81 #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F 82 #define CONFIG_SYS_FSL_I2C_OFFSET 0x58000 83 #define CONFIG_SYS_IMMR CONFIG_SYS_MBAR 84 85 /* 86 * Defines processor clock - important for correct timings concerning serial 87 * interface etc. 88 */ 89 90 #define CONFIG_SYS_CLK 80000000 91 #define CONFIG_SYS_CPU_CLK (CONFIG_SYS_CLK * 3) 92 #define CONFIG_SYS_SDRAM_SIZE 32 /* SDRAM size in MB */ 93 94 #define CONFIG_SYS_CORE_SRAM_SIZE 0x8000 95 #define CONFIG_SYS_CORE_SRAM 0x80000000 96 97 #define CONFIG_SYS_UNIFY_CACHE 98 99 /* 100 * Define baudrate for UART1 (console output, tftp, ...) 101 * default value of CONFIG_BAUDRATE for Sentec board: 19200 baud 102 * CONFIG_SYS_BAUDRATE_TABLE defines values that can be selected 103 * in u-boot command interface 104 */ 105 106 #define CONFIG_BAUDRATE 115200 107 108 #define CONFIG_MCFUART 109 #define CONFIG_SYS_UART_PORT (2) 110 #define CONFIG_SYS_UART2_ALT3_GPIO 111 112 /* 113 * Watchdog configuration; Watchdog is disabled for running from RAM 114 * and set to highest possible value else. Beware there is no check 115 * in the watchdog code to validate the timeout value set here! 116 */ 117 118 #ifndef CONFIG_MONITOR_IS_IN_RAM 119 #define CONFIG_WATCHDOG 120 #define CONFIG_WATCHDOG_TIMEOUT 3355 /* timeout in milliseconds */ 121 #endif 122 123 /* 124 * Configuration for environment 125 * Environment is located in the last sector of the flash 126 */ 127 128 #ifndef CONFIG_MONITOR_IS_IN_RAM 129 #define CONFIG_ENV_OFFSET 0x1FF8000 130 #define CONFIG_ENV_SECT_SIZE 0x8000 131 #define CONFIG_ENV_IS_IN_FLASH 1 132 #else 133 /* 134 * environment in RAM - This is used to use a single PC-based application 135 * to load an image, load U-Boot, load an environment and then start U-Boot 136 * to execute the commands from the environment. Feedback is done via setting 137 * and reading memory locations. 138 */ 139 #define CONFIG_ENV_ADDR 0x40060000 140 #define CONFIG_ENV_SECT_SIZE 0x8000 141 #define CONFIG_ENV_IS_IN_FLASH 1 142 #endif 143 144 /* here we put our FPGA configuration... */ 145 #define CONFIG_MISC_INIT_R 1 146 147 /* Define user parameters that have to be customized most likely */ 148 149 /* AUTOBOOT settings - booting images automatically by u-boot after power on */ 150 151 /* 152 * The following settings will be contained in the environment block ; if you 153 * want to use a neutral environment all those settings can be manually set in 154 * u-boot: 'set' command 155 */ 156 157 #define CONFIG_EXTRA_ENV_SETTINGS \ 158 "loaderversion=11\0" \ 159 "card_id="__stringify(ASTRO_ID)"\0" \ 160 "alterafile=0\0" \ 161 "xilinxfile=0\0" \ 162 "xilinxload=imxtract 0x540000 $xilinxfile 0x41000000&&"\ 163 "fpga load 0 0x41000000 $filesize\0" \ 164 "alteraload=imxtract 0x6c0000 $alterafile 0x41000000&&"\ 165 "fpga load 1 0x41000000 $filesize\0" \ 166 "env_default=1\0" \ 167 "env_check=if test $env_default -eq 1;"\ 168 " then setenv env_default 0;saveenv;fi\0" 169 170 /* 171 * "update" is a non-standard command that has to be supplied 172 * by external update.c; This is not included in mainline because 173 * it needs non-blocking CFI routines. 174 */ 175 #ifdef CONFIG_MONITOR_IS_IN_RAM 176 #define CONFIG_BOOTCOMMAND "" /* no autoboot in this case */ 177 #else 178 #if CONFIG_ASTRO_V532 179 #define CONFIG_BOOTCOMMAND "protect off 0x80000 0x1ffffff;run env_check;"\ 180 "run xilinxload&&run alteraload&&bootm 0x80000;"\ 181 "update;reset" 182 #else 183 #define CONFIG_BOOTCOMMAND "protect off 0x80000 0x1ffffff;run env_check;"\ 184 "run xilinxload&&bootm 0x80000;update;reset" 185 #endif 186 #endif 187 188 /* default bootargs that are considered during boot */ 189 #define CONFIG_BOOTARGS " console=ttyS2,115200 rootfstype=romfs"\ 190 " loaderversion=$loaderversion" 191 192 /* default RAM address for user programs */ 193 #define CONFIG_SYS_LOAD_ADDR 0x20000 194 195 #define CONFIG_SYS_LONGHELP 196 197 #if (CONFIG_COMMANDS & CONFIG_CMD_KGDB) 198 #define CONFIG_SYS_CBSIZE 1024 199 #else 200 #define CONFIG_SYS_CBSIZE 256 201 #endif 202 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) 203 #define CONFIG_SYS_MAXARGS 16 204 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 205 206 #define CONFIG_FPGA_COUNT 1 207 #define CONFIG_FPGA 208 #define CONFIG_FPGA_XILINX 209 #define CONFIG_FPGA_SPARTAN3 210 #define CONFIG_FPGA_ALTERA 211 #define CONFIG_FPGA_CYCLON2 212 #define CONFIG_SYS_FPGA_PROG_FEEDBACK 213 #define CONFIG_SYS_FPGA_WAIT 1000 214 215 /* End of user parameters to be customized */ 216 217 /* Defines memory range for test */ 218 219 #define CONFIG_SYS_MEMTEST_START 0x40020000 220 #define CONFIG_SYS_MEMTEST_END 0x41ffffff 221 222 /* 223 * Low Level Configuration Settings 224 * (address mappings, register initial values, etc.) 225 * You should know what you are doing if you make changes here. 226 */ 227 228 /* Base register address */ 229 230 #define CONFIG_SYS_MBAR 0xFC000000 /* Register Base Addrs */ 231 232 /* System Conf. Reg. & System Protection Reg. */ 233 234 #define CONFIG_SYS_SCR 0x0003; 235 #define CONFIG_SYS_SPR 0xffff; 236 237 /* 238 * Definitions for initial stack pointer and data area (in internal SRAM) 239 */ 240 #define CONFIG_SYS_INIT_RAM_ADDR 0x80000000 241 #define CONFIG_SYS_INIT_RAM_SIZE 0x8000 242 #define CONFIG_SYS_INIT_RAM_CTRL 0x221 243 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ 244 GENERATED_GBL_DATA_SIZE) 245 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET 246 247 /* 248 * Start addresses for the final memory configuration 249 * (Set up by the startup code) 250 * for MCF5373, the allowable range is 0x40000000 to 0x7FF00000 251 */ 252 #define CONFIG_SYS_SDRAM_BASE 0x40000000 253 254 /* 255 * Chipselect bank definitions 256 * 257 * CS0 - Flash 32MB (first 16MB) 258 * CS1 - Flash 32MB (second half) 259 * CS2 - FPGA 260 * CS3 - FPGA 261 * CS4 - unused 262 * CS5 - unused 263 */ 264 #define CONFIG_SYS_CS0_BASE 0 265 #define CONFIG_SYS_CS0_MASK 0x00ff0001 266 #define CONFIG_SYS_CS0_CTRL 0x00001fc0 267 268 #define CONFIG_SYS_CS1_BASE 0x01000000 269 #define CONFIG_SYS_CS1_MASK 0x00ff0001 270 #define CONFIG_SYS_CS1_CTRL 0x00001fc0 271 272 #define CONFIG_SYS_CS2_BASE 0x20000000 273 #define CONFIG_SYS_CS2_MASK 0x00ff0001 274 #define CONFIG_SYS_CS2_CTRL 0x0000fec0 275 276 #define CONFIG_SYS_CS3_BASE 0x21000000 277 #define CONFIG_SYS_CS3_MASK 0x00ff0001 278 #define CONFIG_SYS_CS3_CTRL 0x0000fec0 279 280 #define CONFIG_SYS_FLASH_BASE 0x00000000 281 282 #ifdef CONFIG_MONITOR_IS_IN_RAM 283 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE 284 #else 285 /* This is mainly used during relocation in start.S */ 286 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) 287 #endif 288 /* Reserve 256 kB for Monitor */ 289 #define CONFIG_SYS_MONITOR_LEN (256 << 10) 290 291 #define CONFIG_SYS_BOOTPARAMS_LEN (64 * 1024) 292 /* Reserve 128 kB for malloc() */ 293 #define CONFIG_SYS_MALLOC_LEN (128 << 10) 294 295 /* 296 * For booting Linux, the board info and command line data 297 * have to be in the first 8 MB of memory, since this is 298 * the maximum mapped by the Linux kernel during initialization ?? 299 */ 300 #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + \ 301 (CONFIG_SYS_SDRAM_SIZE << 20)) 302 303 /* FLASH organization */ 304 #define CONFIG_SYS_MAX_FLASH_BANKS 1 305 #define CONFIG_SYS_MAX_FLASH_SECT 259 306 #define CONFIG_SYS_FLASH_ERASE_TOUT 1000 307 308 #define CONFIG_SYS_FLASH_CFI 1 309 #define CONFIG_FLASH_CFI_DRIVER 1 310 #define CONFIG_SYS_FLASH_SIZE 0x2000000 311 #define CONFIG_SYS_FLASH_PROTECTION 1 312 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 313 #define CONFIG_SYS_FLASH_CFI_NONBLOCK 1 314 315 #define LDS_BOARD_TEXT \ 316 . = DEFINED(env_offset) ? env_offset : .; \ 317 common/env_embedded.o (.text*) 318 319 #if ENABLE_JFFS 320 /* JFFS Partition offset set */ 321 #define CONFIG_SYS_JFFS2_FIRST_BANK 0 322 #define CONFIG_SYS_JFFS2_NUM_BANKS 1 323 /* 512k reserved for u-boot */ 324 #define CONFIG_SYS_JFFS2_FIRST_SECTOR 0x40 325 #endif 326 327 /* Cache Configuration */ 328 #define CONFIG_SYS_CACHELINE_SIZE 16 329 330 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ 331 CONFIG_SYS_INIT_RAM_SIZE - 8) 332 #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ 333 CONFIG_SYS_INIT_RAM_SIZE - 4) 334 #define CONFIG_SYS_ICACHE_INV (CF_CACR_CINVA) 335 #define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \ 336 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \ 337 CF_ACR_EN | CF_ACR_SM_ALL) 338 #define CONFIG_SYS_CACHE_ICACR (CF_CACR_EC | CF_CACR_CINVA | \ 339 CF_CACR_DCM_P) 340 341 #endif /* _CONFIG_ASTRO_MCF5373L_H */ 342