1 /* 2 * Copyright (C) 2012-2020 ASPEED Technology Inc. 3 * Ryan Chen <ryan_chen@aspeedtech.com> 4 * 5 * Copyright 2016 IBM Corporation 6 * (C) Copyright 2016 Google, Inc 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11 #ifndef __AST_COMMON_CONFIG_H 12 #define __AST_COMMON_CONFIG_H 13 14 /* Misc CPU related */ 15 #define CONFIG_CMDLINE_TAG 16 #define CONFIG_SETUP_MEMORY_TAGS 17 #define CONFIG_INITRD_TAG 18 19 /* Enable cache controller */ 20 #define CONFIG_SYS_DCACHE_OFF 21 22 #define CONFIG_SYS_SDRAM_BASE 0x80000000 23 24 #ifdef CONFIG_PRE_CON_BUF_SZ 25 #define CONFIG_SYS_INIT_RAM_ADDR (0x1e720000 + CONFIG_PRE_CON_BUF_SZ) 26 #define CONFIG_SYS_INIT_RAM_SIZE (36*1024 - CONFIG_PRE_CON_BUF_SZ) 27 #else 28 #define CONFIG_SYS_INIT_RAM_ADDR (0x1e720000) 29 #define CONFIG_SYS_INIT_RAM_SIZE (36*1024) 30 #endif 31 32 #define SYS_INIT_RAM_END (CONFIG_SYS_INIT_RAM_ADDR \ 33 + CONFIG_SYS_INIT_RAM_SIZE) 34 #define CONFIG_SYS_INIT_SP_ADDR (SYS_INIT_RAM_END \ 35 - GENERATED_GBL_DATA_SIZE) 36 37 #define CONFIG_NR_DRAM_BANKS 1 38 39 #define CONFIG_SYS_MALLOC_LEN (32 << 20) 40 41 /* 42 * NS16550 Configuration 43 */ 44 45 /* 46 * BOOTP options 47 */ 48 #define CONFIG_BOOTP_BOOTFILESIZE 49 50 /* 51 * Miscellaneous configurable options 52 */ 53 54 #define CONFIG_BOOTCOMMAND "bootm 20080000 20300000" 55 #define CONFIG_ENV_OVERWRITE 56 57 #define CONFIG_EXTRA_ENV_SETTINGS \ 58 "verify=yes\0" \ 59 "spi_dma=yes\0" \ 60 "" 61 62 #endif /* __AST_COMMON_CONFIG_H */ 63