1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright (C) 2012-2020 ASPEED Technology Inc. 4 * Ryan Chen <ryan_chen@aspeedtech.com> 5 * 6 * Copyright 2016 IBM Corporation 7 * (C) Copyright 2016 Google, Inc 8 */ 9 10 #ifndef __AST_COMMON_CONFIG_H 11 #define __AST_COMMON_CONFIG_H 12 13 /* Misc CPU related */ 14 #define CONFIG_CMDLINE_TAG 15 #define CONFIG_SETUP_MEMORY_TAGS 16 #define CONFIG_INITRD_TAG 17 18 /* Enable cache controller */ 19 #define CONFIG_SYS_DCACHE_OFF 20 21 #define CONFIG_SYS_SDRAM_BASE 0x80000000 22 23 #ifdef CONFIG_PRE_CON_BUF_SZ 24 #define CONFIG_SYS_INIT_RAM_ADDR (0x1e720000 + CONFIG_PRE_CON_BUF_SZ) 25 #define CONFIG_SYS_INIT_RAM_SIZE (36*1024 - CONFIG_PRE_CON_BUF_SZ) 26 #else 27 #define CONFIG_SYS_INIT_RAM_ADDR (0x1e720000) 28 #define CONFIG_SYS_INIT_RAM_SIZE (36*1024) 29 #endif 30 31 #define SYS_INIT_RAM_END (CONFIG_SYS_INIT_RAM_ADDR \ 32 + CONFIG_SYS_INIT_RAM_SIZE) 33 #define CONFIG_SYS_INIT_SP_ADDR (SYS_INIT_RAM_END \ 34 - GENERATED_GBL_DATA_SIZE) 35 36 #define CONFIG_SYS_MALLOC_LEN (32 << 20) 37 38 /* 39 * NS16550 Configuration 40 */ 41 42 /* 43 * BOOTP options 44 */ 45 #define CONFIG_BOOTP_BOOTFILESIZE 46 47 /* 48 * Miscellaneous configurable options 49 */ 50 51 #define CONFIG_BOOTCOMMAND "bootm 20080000 20300000" 52 #define CONFIG_ENV_OVERWRITE 53 54 #define CONFIG_EXTRA_ENV_SETTINGS \ 55 "verify=yes\0" \ 56 "spi_dma=yes\0" \ 57 "" 58 59 #endif /* __AST_COMMON_CONFIG_H */ 60