1 /*
2  * Configuation settings for the bonito board
3  *
4  * Copyright (C) 2012 Renesas Solutions Corp.
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 
9 #ifndef __ARMADILLO_800EVA_H
10 #define __ARMADILLO_800EVA_H
11 
12 #undef DEBUG
13 #define CONFIG_R8A7740
14 #define CONFIG_ARCH_RMOBILE_BOARD_STRING "Armadillo-800EVA Board\n"
15 #define CONFIG_SH_GPIO_PFC
16 
17 #include <asm/arch/rmobile.h>
18 
19 #define CONFIG_CMD_SDRAM
20 
21 #define BOARD_LATE_INIT
22 
23 #define CONFIG_BOOTARGS		""
24 
25 #undef	CONFIG_SHOW_BOOT_PROGRESS
26 
27 #define CONFIG_ARCH_CPU_INIT
28 #define CONFIG_TMU_TIMER
29 #define CONFIG_SYS_DCACHE_OFF
30 
31 /* STACK */
32 #define CONFIG_SYS_INIT_SP_ADDR		0xE8083000
33 #define STACK_AREA_SIZE				0xC000
34 #define LOW_LEVEL_MERAM_STACK	\
35 		(CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
36 
37 /* MEMORY */
38 #define ARMADILLO_800EVA_SDRAM_BASE	0x40000000
39 #define ARMADILLO_800EVA_SDRAM_SIZE	(512 * 1024 * 1024)
40 
41 #define CONFIG_SYS_LONGHELP
42 #define CONFIG_SYS_CBSIZE		256
43 #define CONFIG_SYS_PBSIZE		256
44 #define CONFIG_SYS_MAXARGS		16
45 #define CONFIG_SYS_BARGSIZE		512
46 #define CONFIG_SYS_BAUDRATE_TABLE	{ 115200 }
47 
48 /* SCIF */
49 #define CONFIG_CONS_SCIF1
50 #define SCIF0_BASE		0xe6c40000
51 #define SCIF1_BASE		0xe6c50000
52 #define SCIF2_BASE		0xe6c60000
53 #define SCIF4_BASE		0xe6c80000
54 #define	CONFIG_SCIF_A
55 
56 #define CONFIG_SYS_MEMTEST_START	(ARMADILLO_800EVA_SDRAM_BASE)
57 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + \
58 					 504 * 1024 * 1024)
59 #undef	CONFIG_SYS_ALT_MEMTEST
60 #undef	CONFIG_SYS_MEMTEST_SCRATCH
61 #undef	CONFIG_SYS_LOADS_BAUD_CHANGE
62 
63 #define CONFIG_SYS_SDRAM_BASE		(ARMADILLO_800EVA_SDRAM_BASE)
64 #define CONFIG_SYS_SDRAM_SIZE		(ARMADILLO_800EVA_SDRAM_SIZE)
65 #define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + \
66 					 64 * 1024 * 1024)
67 #define CONFIG_NR_DRAM_BANKS		1
68 
69 #define CONFIG_SYS_MONITOR_BASE		0x00000000
70 #define CONFIG_SYS_MONITOR_LEN		(256 * 1024)
71 #define CONFIG_SYS_MALLOC_LEN		(1 * 1024 * 1024)
72 #define CONFIG_SYS_BOOTMAPSZ		(8 * 1024 * 1024)
73 #define CONFIG_SYS_TEXT_BASE	0xE80C0000
74 
75 /* FLASH */
76 #define CONFIG_SYS_FLASH_CFI
77 #define CONFIG_SYS_FLASH_CFI_WIDTH	FLASH_CFI_16BIT
78 #define CONFIG_SYS_FLASH_BASE		0x00000000
79 #define CONFIG_SYS_MAX_FLASH_SECT	512
80 #define CONFIG_SYS_MAX_FLASH_BANKS	1
81 #define CONFIG_SYS_FLASH_BANKS_LIST	{ (CONFIG_SYS_FLASH_BASE) }
82 
83 #define CONFIG_SYS_FLASH_ERASE_TOUT	3000
84 #define CONFIG_SYS_FLASH_WRITE_TOUT	3000
85 #define CONFIG_SYS_FLASH_LOCK_TOUT	3000
86 #define CONFIG_SYS_FLASH_UNLOCK_TOUT	3000
87 
88 /* ENV setting */
89 #define CONFIG_ENV_OVERWRITE	1
90 #define CONFIG_ENV_SECT_SIZE	(128 * 1024)
91 #define CONFIG_ENV_ADDR		(CONFIG_SYS_FLASH_BASE + \
92 				 CONFIG_SYS_MONITOR_LEN)
93 #define CONFIG_ENV_OFFSET	(CONFIG_ENV_ADDR)
94 #define CONFIG_ENV_SIZE		(CONFIG_ENV_SECT_SIZE)
95 #define CONFIG_ENV_SIZE_REDUND	(CONFIG_ENV_SECT_SIZE)
96 
97 /* SH Ether */
98 #define CONFIG_SH_ETHER
99 #define CONFIG_SH_ETHER_USE_PORT	0
100 #define CONFIG_SH_ETHER_PHY_ADDR	0x0
101 #define CONFIG_SH_ETHER_BASE_ADDR	0xe9a00000
102 #define CONFIG_SH_ETHER_SH7734_MII	(0x01)
103 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII
104 #define CONFIG_PHY_SMSC
105 #define CONFIG_BITBANGMII
106 #define CONFIG_BITBANGMII_MULTI
107 
108 /* Board Clock */
109 #define CONFIG_SYS_CLK_FREQ	50000000
110 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
111 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
112 #define CONFIG_SYS_TMU_CLK_DIV	4
113 
114 #endif	/* __ARMADILLO_800EVA_H */
115