1 /*
2  * Configuation settings for the bonito board
3  *
4  * Copyright (C) 2012 Renesas Solutions Corp.
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 
9 #ifndef __ARMADILLO_800EVA_H
10 #define __ARMADILLO_800EVA_H
11 
12 #undef DEBUG
13 #define CONFIG_R8A7740
14 #define CONFIG_ARCH_RMOBILE_BOARD_STRING "Armadillo-800EVA Board\n"
15 #define CONFIG_SH_GPIO_PFC
16 
17 #include <asm/arch/rmobile.h>
18 
19 #define BOARD_LATE_INIT
20 
21 #undef	CONFIG_SHOW_BOOT_PROGRESS
22 
23 #define CONFIG_ARCH_CPU_INIT
24 #define CONFIG_TMU_TIMER
25 #define CONFIG_SYS_DCACHE_OFF
26 
27 /* STACK */
28 #define CONFIG_SYS_INIT_SP_ADDR		0xE8083000
29 #define STACK_AREA_SIZE				0xC000
30 #define LOW_LEVEL_MERAM_STACK	\
31 		(CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
32 
33 /* MEMORY */
34 #define ARMADILLO_800EVA_SDRAM_BASE	0x40000000
35 #define ARMADILLO_800EVA_SDRAM_SIZE	(512 * 1024 * 1024)
36 
37 #define CONFIG_SYS_LONGHELP
38 #define CONFIG_SYS_CBSIZE		256
39 #define CONFIG_SYS_PBSIZE		256
40 #define CONFIG_SYS_MAXARGS		16
41 #define CONFIG_SYS_BARGSIZE		512
42 #define CONFIG_SYS_BAUDRATE_TABLE	{ 115200 }
43 
44 /* SCIF */
45 #define CONFIG_CONS_SCIF1
46 #define SCIF0_BASE		0xe6c40000
47 #define SCIF1_BASE		0xe6c50000
48 #define SCIF2_BASE		0xe6c60000
49 #define SCIF4_BASE		0xe6c80000
50 #define	CONFIG_SCIF_A
51 
52 #define CONFIG_SYS_MEMTEST_START	(ARMADILLO_800EVA_SDRAM_BASE)
53 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + \
54 					 504 * 1024 * 1024)
55 #undef	CONFIG_SYS_ALT_MEMTEST
56 #undef	CONFIG_SYS_MEMTEST_SCRATCH
57 #undef	CONFIG_SYS_LOADS_BAUD_CHANGE
58 
59 #define CONFIG_SYS_SDRAM_BASE		(ARMADILLO_800EVA_SDRAM_BASE)
60 #define CONFIG_SYS_SDRAM_SIZE		(ARMADILLO_800EVA_SDRAM_SIZE)
61 #define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + \
62 					 64 * 1024 * 1024)
63 #define CONFIG_NR_DRAM_BANKS		1
64 
65 #define CONFIG_SYS_MONITOR_BASE		0x00000000
66 #define CONFIG_SYS_MONITOR_LEN		(256 * 1024)
67 #define CONFIG_SYS_MALLOC_LEN		(1 * 1024 * 1024)
68 #define CONFIG_SYS_BOOTMAPSZ		(8 * 1024 * 1024)
69 #define CONFIG_SYS_TEXT_BASE	0xE80C0000
70 
71 /* FLASH */
72 #define CONFIG_SYS_FLASH_CFI
73 #define CONFIG_SYS_FLASH_CFI_WIDTH	FLASH_CFI_16BIT
74 #define CONFIG_SYS_FLASH_BASE		0x00000000
75 #define CONFIG_SYS_MAX_FLASH_SECT	512
76 #define CONFIG_SYS_MAX_FLASH_BANKS	1
77 #define CONFIG_SYS_FLASH_BANKS_LIST	{ (CONFIG_SYS_FLASH_BASE) }
78 
79 #define CONFIG_SYS_FLASH_ERASE_TOUT	3000
80 #define CONFIG_SYS_FLASH_WRITE_TOUT	3000
81 #define CONFIG_SYS_FLASH_LOCK_TOUT	3000
82 #define CONFIG_SYS_FLASH_UNLOCK_TOUT	3000
83 
84 /* ENV setting */
85 #define CONFIG_ENV_OVERWRITE	1
86 #define CONFIG_ENV_SECT_SIZE	(128 * 1024)
87 #define CONFIG_ENV_ADDR		(CONFIG_SYS_FLASH_BASE + \
88 				 CONFIG_SYS_MONITOR_LEN)
89 #define CONFIG_ENV_OFFSET	(CONFIG_ENV_ADDR)
90 #define CONFIG_ENV_SIZE		(CONFIG_ENV_SECT_SIZE)
91 #define CONFIG_ENV_SIZE_REDUND	(CONFIG_ENV_SECT_SIZE)
92 
93 /* SH Ether */
94 #define CONFIG_SH_ETHER
95 #define CONFIG_SH_ETHER_USE_PORT	0
96 #define CONFIG_SH_ETHER_PHY_ADDR	0x0
97 #define CONFIG_SH_ETHER_BASE_ADDR	0xe9a00000
98 #define CONFIG_SH_ETHER_SH7734_MII	(0x01)
99 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII
100 #define CONFIG_PHY_SMSC
101 #define CONFIG_BITBANGMII
102 #define CONFIG_BITBANGMII_MULTI
103 
104 /* Board Clock */
105 #define CONFIG_SYS_CLK_FREQ	50000000
106 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
107 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
108 #define CONFIG_SYS_TMU_CLK_DIV	4
109 
110 #endif	/* __ARMADILLO_800EVA_H */
111