1 /* 2 * Configuation settings for the bonito board 3 * 4 * Copyright (C) 2012 Renesas Solutions Corp. 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __ARMADILLO_800EVA_H 10 #define __ARMADILLO_800EVA_H 11 12 #undef DEBUG 13 #define CONFIG_R8A7740 14 #define CONFIG_ARCH_RMOBILE_BOARD_STRING "Armadillo-800EVA Board\n" 15 #define CONFIG_SH_GPIO_PFC 16 17 #include <asm/arch/rmobile.h> 18 19 #define BOARD_LATE_INIT 20 21 #define CONFIG_BOOTARGS "" 22 23 #undef CONFIG_SHOW_BOOT_PROGRESS 24 25 #define CONFIG_ARCH_CPU_INIT 26 #define CONFIG_TMU_TIMER 27 #define CONFIG_SYS_DCACHE_OFF 28 29 /* STACK */ 30 #define CONFIG_SYS_INIT_SP_ADDR 0xE8083000 31 #define STACK_AREA_SIZE 0xC000 32 #define LOW_LEVEL_MERAM_STACK \ 33 (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4) 34 35 /* MEMORY */ 36 #define ARMADILLO_800EVA_SDRAM_BASE 0x40000000 37 #define ARMADILLO_800EVA_SDRAM_SIZE (512 * 1024 * 1024) 38 39 #define CONFIG_SYS_LONGHELP 40 #define CONFIG_SYS_CBSIZE 256 41 #define CONFIG_SYS_PBSIZE 256 42 #define CONFIG_SYS_MAXARGS 16 43 #define CONFIG_SYS_BARGSIZE 512 44 #define CONFIG_SYS_BAUDRATE_TABLE { 115200 } 45 46 /* SCIF */ 47 #define CONFIG_CONS_SCIF1 48 #define SCIF0_BASE 0xe6c40000 49 #define SCIF1_BASE 0xe6c50000 50 #define SCIF2_BASE 0xe6c60000 51 #define SCIF4_BASE 0xe6c80000 52 #define CONFIG_SCIF_A 53 54 #define CONFIG_SYS_MEMTEST_START (ARMADILLO_800EVA_SDRAM_BASE) 55 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \ 56 504 * 1024 * 1024) 57 #undef CONFIG_SYS_ALT_MEMTEST 58 #undef CONFIG_SYS_MEMTEST_SCRATCH 59 #undef CONFIG_SYS_LOADS_BAUD_CHANGE 60 61 #define CONFIG_SYS_SDRAM_BASE (ARMADILLO_800EVA_SDRAM_BASE) 62 #define CONFIG_SYS_SDRAM_SIZE (ARMADILLO_800EVA_SDRAM_SIZE) 63 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + \ 64 64 * 1024 * 1024) 65 #define CONFIG_NR_DRAM_BANKS 1 66 67 #define CONFIG_SYS_MONITOR_BASE 0x00000000 68 #define CONFIG_SYS_MONITOR_LEN (256 * 1024) 69 #define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024) 70 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) 71 #define CONFIG_SYS_TEXT_BASE 0xE80C0000 72 73 /* FLASH */ 74 #define CONFIG_SYS_FLASH_CFI 75 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT 76 #define CONFIG_SYS_FLASH_BASE 0x00000000 77 #define CONFIG_SYS_MAX_FLASH_SECT 512 78 #define CONFIG_SYS_MAX_FLASH_BANKS 1 79 #define CONFIG_SYS_FLASH_BANKS_LIST { (CONFIG_SYS_FLASH_BASE) } 80 81 #define CONFIG_SYS_FLASH_ERASE_TOUT 3000 82 #define CONFIG_SYS_FLASH_WRITE_TOUT 3000 83 #define CONFIG_SYS_FLASH_LOCK_TOUT 3000 84 #define CONFIG_SYS_FLASH_UNLOCK_TOUT 3000 85 86 /* ENV setting */ 87 #define CONFIG_ENV_OVERWRITE 1 88 #define CONFIG_ENV_SECT_SIZE (128 * 1024) 89 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + \ 90 CONFIG_SYS_MONITOR_LEN) 91 #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR) 92 #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) 93 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE) 94 95 /* SH Ether */ 96 #define CONFIG_SH_ETHER 97 #define CONFIG_SH_ETHER_USE_PORT 0 98 #define CONFIG_SH_ETHER_PHY_ADDR 0x0 99 #define CONFIG_SH_ETHER_BASE_ADDR 0xe9a00000 100 #define CONFIG_SH_ETHER_SH7734_MII (0x01) 101 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII 102 #define CONFIG_PHY_SMSC 103 #define CONFIG_BITBANGMII 104 #define CONFIG_BITBANGMII_MULTI 105 106 /* Board Clock */ 107 #define CONFIG_SYS_CLK_FREQ 50000000 108 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ 109 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ 110 #define CONFIG_SYS_TMU_CLK_DIV 4 111 112 #endif /* __ARMADILLO_800EVA_H */ 113