1 /* 2 * 3 * Configuration settings for the Armadeus Project motherboard APF27 4 * 5 * Copyright (C) 2008-2013 Eric Jarrige <eric.jarrige@armadeus.org> 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #ifndef __CONFIG_H 11 #define __CONFIG_H 12 13 #define CONFIG_VERSION_VARIABLE 14 #define CONFIG_ENV_VERSION 10 15 #define CONFIG_IDENT_STRING " apf27 patch 3.10" 16 #define CONFIG_BOARD_NAME apf27 17 18 /* 19 * SoC configurations 20 */ 21 #define CONFIG_MX27 /* This is a Freescale i.MX27 Chip */ 22 #define CONFIG_MACH_TYPE 1698 /* APF27 */ 23 #define CONFIG_SYS_GENERIC_BOARD 24 25 /* 26 * Enable the call to miscellaneous platform dependent initialization. 27 */ 28 #define CONFIG_SYS_NO_FLASH /* to be define before <config_cmd_default.h> */ 29 30 /* 31 * Board display option 32 */ 33 #define CONFIG_DISPLAY_BOARDINFO 34 #define CONFIG_DISPLAY_CPUINFO 35 36 /* 37 * SPL 38 */ 39 #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" 40 #define CONFIG_SPL_LDSCRIPT "arch/$(ARCH)/cpu/u-boot-spl.lds" 41 #define CONFIG_SPL_MAX_SIZE 2048 42 #define CONFIG_SPL_TEXT_BASE 0xA0000000 43 44 /* NAND boot config */ 45 #define CONFIG_SPL_NAND_SUPPORT 46 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 47 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x800 48 #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE 49 #define CONFIG_SYS_NAND_U_BOOT_SIZE CONFIG_SYS_MONITOR_LEN - 0x800 50 51 /* 52 * BOOTP options 53 */ 54 #define CONFIG_BOOTP_SUBNETMASK 55 #define CONFIG_BOOTP_GATEWAY 56 #define CONFIG_BOOTP_HOSTNAME 57 #define CONFIG_BOOTP_BOOTPATH 58 #define CONFIG_BOOTP_BOOTFILESIZE 59 #define CONFIG_BOOTP_DNS 60 #define CONFIG_BOOTP_DNS2 61 62 #define CONFIG_HOSTNAME CONFIG_BOARD_NAME 63 #define CONFIG_ROOTPATH "/tftpboot/" __stringify(CONFIG_BOARD_NAME) "-root" 64 65 /* 66 * U-Boot Commands 67 */ 68 #include <config_cmd_default.h> 69 70 #define CONFIG_CMD_ASKENV /* ask for env variable */ 71 #define CONFIG_CMD_BSP /* Board Specific functions */ 72 #define CONFIG_CMD_CACHE /* icache, dcache */ 73 #define CONFIG_CMD_DATE 74 #define CONFIG_CMD_DHCP /* DHCP Support */ 75 #define CONFIG_CMD_DNS 76 #define CONFIG_CMD_EEPROM 77 #define CONFIG_CMD_EXT2 78 #define CONFIG_CMD_FAT /* FAT support */ 79 #define CONFIG_CMD_IMX_FUSE /* imx iim fuse */ 80 #define CONFIG_CMD_I2C 81 #define CONFIG_CMD_MII /* MII support */ 82 #define CONFIG_CMD_MMC 83 #define CONFIG_CMD_MTDPARTS /* MTD partition support */ 84 #define CONFIG_CMD_NAND /* NAND support */ 85 #define CONFIG_CMD_NAND_LOCK_UNLOCK 86 #define CONFIG_CMD_NAND_TRIMFFS 87 #define CONFIG_CMD_NFS /* NFS support */ 88 #define CONFIG_CMD_PING /* ping support */ 89 #define CONFIG_CMD_SETEXPR /* setexpr support */ 90 #define CONFIG_CMD_UBI 91 #define CONFIG_CMD_UBIFS 92 93 /* 94 * Memory configurations 95 */ 96 #define CONFIG_NR_DRAM_POPULATED 1 97 #define CONFIG_NR_DRAM_BANKS 2 98 99 #define ACFG_SDRAM_MBYTE_SYZE 64 100 101 #define PHYS_SDRAM_1 0xA0000000 102 #define PHYS_SDRAM_2 0xB0000000 103 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 104 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (512<<10)) 105 #define CONFIG_SYS_MEMTEST_START 0xA0000000 /* memtest test area */ 106 #define CONFIG_SYS_MEMTEST_END 0xA0300000 /* 3 MiB RAM test */ 107 108 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE \ 109 + PHYS_SDRAM_1_SIZE - 0x0100000) 110 111 #define CONFIG_SYS_TEXT_BASE 0xA0000800 112 113 /* 114 * FLASH organization 115 */ 116 #define ACFG_MONITOR_OFFSET 0x00000000 117 #define CONFIG_SYS_MONITOR_LEN 0x00100000 /* 1MiB */ 118 #define CONFIG_ENV_IS_IN_NAND 119 #define CONFIG_ENV_OVERWRITE 120 #define CONFIG_ENV_OFFSET 0x00100000 /* NAND offset */ 121 #define CONFIG_ENV_SIZE 0x00020000 /* 128kB */ 122 #define CONFIG_ENV_RANGE 0X00080000 /* 512kB */ 123 #define CONFIG_ENV_OFFSET_REDUND \ 124 (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE) /* +512kB */ 125 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE /* 512kB */ 126 #define CONFIG_FIRMWARE_OFFSET 0x00200000 127 #define CONFIG_FIRMWARE_SIZE 0x00080000 /* 512kB */ 128 #define CONFIG_KERNEL_OFFSET 0x00300000 129 #define CONFIG_ROOTFS_OFFSET 0x00800000 130 131 #define CONFIG_MTDMAP "mxc_nand.0" 132 #define MTDIDS_DEFAULT "nand0=" CONFIG_MTDMAP 133 #define MTDPARTS_DEFAULT "mtdparts=" CONFIG_MTDMAP \ 134 ":1M(u-boot)ro," \ 135 "512K(env)," \ 136 "512K(env2)," \ 137 "512K(firmware)," \ 138 "512K(dtb)," \ 139 "5M(kernel)," \ 140 "-(rootfs)" 141 142 /* 143 * U-Boot general configurations 144 */ 145 #define CONFIG_SYS_LONGHELP 146 #define CONFIG_SYS_PROMPT "BIOS> " /* prompt string */ 147 #define CONFIG_SYS_CBSIZE 2048 /* console I/O buffer */ 148 #define CONFIG_SYS_PBSIZE \ 149 (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) 150 /* Print buffer size */ 151 #define CONFIG_SYS_MAXARGS 16 /* max command args */ 152 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 153 /* Boot argument buffer size */ 154 #define CONFIG_AUTO_COMPLETE 155 #define CONFIG_CMDLINE_EDITING 156 #define CONFIG_SYS_HUSH_PARSER /* enable the "hush" shell */ 157 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " /* secondary prompt string */ 158 #define CONFIG_ENV_VARS_UBOOT_CONFIG 159 #define CONFIG_PREBOOT "run check_flash check_env;" 160 161 162 /* 163 * Boot Linux 164 */ 165 #define CONFIG_CMDLINE_TAG /* send commandline to Kernel */ 166 #define CONFIG_SETUP_MEMORY_TAGS /* send memory definition to kernel */ 167 #define CONFIG_INITRD_TAG /* send initrd params */ 168 169 #define CONFIG_OF_LIBFDT 170 171 #define CONFIG_BOOTDELAY 5 172 #define CONFIG_ZERO_BOOTDELAY_CHECK 173 #define CONFIG_BOOTFILE __stringify(CONFIG_BOARD_NAME) "-linux.bin" 174 #define CONFIG_BOOTARGS "console=" __stringify(ACFG_CONSOLE_DEV) "," \ 175 __stringify(CONFIG_BAUDRATE) " " MTDPARTS_DEFAULT \ 176 " ubi.mtd=rootfs root=ubi0:rootfs rootfstype=ubifs " 177 178 #define ACFG_CONSOLE_DEV ttySMX0 179 #define CONFIG_BOOTCOMMAND "run ubifsboot" 180 #define CONFIG_SYS_AUTOLOAD "no" 181 /* 182 * Default load address for user programs and kernel 183 */ 184 #define CONFIG_LOADADDR 0xA0000000 185 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 186 187 /* 188 * Extra Environments 189 */ 190 #define CONFIG_EXTRA_ENV_SETTINGS \ 191 "env_version=" __stringify(CONFIG_ENV_VERSION) "\0" \ 192 "consoledev=" __stringify(ACFG_CONSOLE_DEV) "\0" \ 193 "mtdparts=" MTDPARTS_DEFAULT "\0" \ 194 "partition=nand0,6\0" \ 195 "u-boot_addr=" __stringify(ACFG_MONITOR_OFFSET) "\0" \ 196 "env_addr=" __stringify(CONFIG_ENV_OFFSET) "\0" \ 197 "firmware_addr=" __stringify(CONFIG_FIRMWARE_OFFSET) "\0" \ 198 "firmware_size=" __stringify(CONFIG_FIRMWARE_SIZE) "\0" \ 199 "kernel_addr=" __stringify(CONFIG_KERNEL_OFFSET) "\0" \ 200 "rootfs_addr=" __stringify(CONFIG_ROOTFS_OFFSET) "\0" \ 201 "board_name=" __stringify(CONFIG_BOARD_NAME) "\0" \ 202 "kernel_addr_r=A0000000\0" \ 203 "check_env=if test -n ${flash_env_version}; " \ 204 "then env default env_version; " \ 205 "else env set flash_env_version ${env_version}; env save; "\ 206 "fi; " \ 207 "if itest ${flash_env_version} < ${env_version}; then " \ 208 "echo \"*** Warning - Environment version" \ 209 " change suggests: run flash_reset_env; reset\"; "\ 210 "env default flash_reset_env; "\ 211 "fi; \0" \ 212 "check_flash=nand lock; nand unlock ${env_addr}; \0" \ 213 "flash_reset_env=env default -f -a; saveenv; run update_env;" \ 214 "echo Flash environment variables erased!\0" \ 215 "download_uboot=tftpboot ${loadaddr} ${board_name}" \ 216 "-u-boot-with-spl.bin\0" \ 217 "flash_uboot=nand unlock ${u-boot_addr} ;" \ 218 "nand erase.part u-boot;" \ 219 "if nand write.trimffs ${fileaddr} ${u-boot_addr} ${filesize};"\ 220 "then nand lock; nand unlock ${env_addr};" \ 221 "echo Flashing of uboot succeed;" \ 222 "else echo Flashing of uboot failed;" \ 223 "fi; \0" \ 224 "update_uboot=run download_uboot flash_uboot\0" \ 225 "download_env=tftpboot ${loadaddr} ${board_name}" \ 226 "-u-boot-env.txt\0" \ 227 "flash_env=env import -t ${loadaddr}; env save; \0" \ 228 "update_env=run download_env flash_env\0" \ 229 "update_all=run update_env update_uboot\0" \ 230 "unlock_regs=mw 10000008 0; mw 10020008 0\0" \ 231 232 /* 233 * Serial Driver 234 */ 235 #define CONFIG_MXC_UART 236 #define CONFIG_CONS_INDEX 1 237 #define CONFIG_BAUDRATE 115200 238 #define CONFIG_MXC_UART_BASE UART1_BASE 239 240 /* 241 * GPIO 242 */ 243 #define CONFIG_MXC_GPIO 244 245 /* 246 * NOR 247 */ 248 249 /* 250 * NAND 251 */ 252 #define CONFIG_NAND_MXC 253 254 #define CONFIG_MXC_NAND_REGS_BASE 0xD8000000 255 #define CONFIG_SYS_NAND_BASE CONFIG_MXC_NAND_REGS_BASE 256 #define CONFIG_SYS_MAX_NAND_DEVICE 1 257 258 #define CONFIG_MXC_NAND_HWECC 259 #define CONFIG_SYS_NAND_LARGEPAGE 260 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT 261 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 262 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) 263 #define CONFIG_SYS_NAND_PAGE_COUNT CONFIG_SYS_NAND_BLOCK_SIZE / \ 264 CONFIG_SYS_NAND_PAGE_SIZE 265 #define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024) 266 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 11 267 #define NAND_MAX_CHIPS 1 268 269 #define CONFIG_FLASH_SHOW_PROGRESS 45 270 #define CONFIG_SYS_NAND_QUIET 1 271 272 /* 273 * Partitions & Filsystems 274 */ 275 #define CONFIG_MTD_DEVICE 276 #define CONFIG_MTD_PARTITIONS 277 #define CONFIG_DOS_PARTITION 278 #define CONFIG_SUPPORT_VFAT 279 280 /* 281 * UBIFS 282 */ 283 #define CONFIG_RBTREE 284 #define CONFIG_LZO 285 286 /* 287 * Ethernet (on SOC imx FEC) 288 */ 289 #define CONFIG_FEC_MXC 290 #define CONFIG_FEC_MXC_PHYADDR 0x1f 291 #define CONFIG_MII /* MII PHY management */ 292 293 /* 294 * FPGA 295 */ 296 #ifndef CONFIG_SPL_BUILD 297 #define CONFIG_FPGA 298 #endif 299 #define CONFIG_FPGA_COUNT 1 300 #define CONFIG_FPGA_XILINX 301 #define CONFIG_FPGA_SPARTAN3 302 #define CONFIG_SYS_FPGA_WAIT 250 /* 250 ms */ 303 #define CONFIG_SYS_FPGA_PROG_FEEDBACK 304 #define CONFIG_SYS_FPGA_CHECK_CTRLC 305 #define CONFIG_SYS_FPGA_CHECK_ERROR 306 307 /* 308 * Fuses - IIM 309 */ 310 #ifdef CONFIG_CMD_IMX_FUSE 311 #define IIM_MAC_BANK 0 312 #define IIM_MAC_ROW 5 313 #define IIM0_SCC_KEY 11 314 #define IIM1_SUID 1 315 #endif 316 317 /* 318 * I2C 319 */ 320 321 #ifdef CONFIG_CMD_I2C 322 #define CONFIG_SYS_I2C 323 #define CONFIG_SYS_I2C_MXC 324 #define CONFIG_SYS_MXC_I2C1_SPEED 100000 /* 100 kHz */ 325 #define CONFIG_SYS_MXC_I2C1_SLAVE 0x7F 326 #define CONFIG_SYS_MXC_I2C2_SPEED 100000 /* 100 kHz */ 327 #define CONFIG_SYS_MXC_I2C2_SLAVE 0x7F 328 #define CONFIG_SYS_I2C_NOPROBES { } 329 330 #ifdef CONFIG_CMD_EEPROM 331 # define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM 24LC02 */ 332 # define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */ 333 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 334 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* msec */ 335 #endif /* CONFIG_CMD_EEPROM */ 336 #endif /* CONFIG_CMD_I2C */ 337 338 /* 339 * SD/MMC 340 */ 341 #ifdef CONFIG_CMD_MMC 342 #define CONFIG_MMC 343 #define CONFIG_GENERIC_MMC 344 #define CONFIG_MXC_MMC 345 #define CONFIG_MXC_MCI_REGS_BASE 0x10014000 346 #endif 347 348 /* 349 * RTC 350 */ 351 #ifdef CONFIG_CMD_DATE 352 #define CONFIG_RTC_DS1374 353 #define CONFIG_SYS_RTC_BUS_NUM 0 354 #endif /* CONFIG_CMD_DATE */ 355 356 /* 357 * PLL 358 * 359 * 31 | x |x| x x x x |x x x x x x x x x x |x x|x x x x|x x x x x x x x x x| 0 360 * |CPLM|X|----PD---|--------MFD---------|XXX|--MFI--|-----MFN-----------| 361 */ 362 #define CONFIG_MX27_CLK32 32768 /* 32768 or 32000 Hz crystal */ 363 364 #if (ACFG_SDRAM_MBYTE_SYZE == 64) /* micron MT46H16M32LF -6 */ 365 /* micron 64MB */ 366 #define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */ 367 #define PHYS_SDRAM_2_SIZE 0x04000000 /* 64 MB */ 368 #endif 369 370 #if (ACFG_SDRAM_MBYTE_SYZE == 128) 371 /* micron 128MB */ 372 #define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */ 373 #define PHYS_SDRAM_2_SIZE 0x08000000 /* 128 MB */ 374 #endif 375 376 #if (ACFG_SDRAM_MBYTE_SYZE == 256) 377 /* micron 256MB */ 378 #define PHYS_SDRAM_1_SIZE 0x10000000 /* 256 MB */ 379 #define PHYS_SDRAM_2_SIZE 0x10000000 /* 256 MB */ 380 #endif 381 382 #endif /* __CONFIG_H */ 383